va416xx_hal/
edac.rs

1use crate::{enable_nvic_interrupt, pac};
2
3#[inline(always)]
4pub fn enable_rom_scrub(syscfg: &mut pac::Sysconfig, counter_reset: u16) {
5    syscfg
6        .rom_scrub()
7        .write(|w| unsafe { w.bits(counter_reset as u32) });
8}
9
10#[inline(always)]
11pub fn enable_ram0_scrub(syscfg: &mut pac::Sysconfig, counter_reset: u16) {
12    syscfg
13        .ram0_scrub()
14        .write(|w| unsafe { w.bits(counter_reset as u32) });
15}
16
17#[inline(always)]
18pub fn enable_ram1_scrub(syscfg: &mut pac::Sysconfig, counter_reset: u16) {
19    syscfg
20        .ram1_scrub()
21        .write(|w| unsafe { w.bits(counter_reset as u32) });
22}
23
24/// This function enables the SBE related interrupts. The user should also provide a
25/// `EDAC_SBE` ISR and use [clear_sbe_irq] inside that ISR at the very least.
26#[inline(always)]
27pub fn enable_sbe_irq() {
28    unsafe {
29        enable_nvic_interrupt(pac::Interrupt::EDAC_SBE);
30    }
31}
32
33/// This function enables the SBE related interrupts. The user should also provide a
34/// `EDAC_MBE` ISR and use [clear_mbe_irq] inside that ISR at the very least.
35#[inline(always)]
36pub fn enable_mbe_irq() {
37    unsafe {
38        enable_nvic_interrupt(pac::Interrupt::EDAC_MBE);
39    }
40}
41
42/// This function should be called in the user provided `EDAC_SBE` interrupt-service routine
43/// to clear the SBE related interrupts.
44#[inline(always)]
45pub fn clear_sbe_irq() {
46    // Safety: This function only clears SBE related IRQs
47    let syscfg = unsafe { pac::Sysconfig::steal() };
48    syscfg.irq_clr().write(|w| {
49        w.romsbe().set_bit();
50        w.ram0sbe().set_bit();
51        w.ram1sbe().set_bit()
52    });
53}
54
55/// This function should be called in the user provided `EDAC_MBE` interrupt-service routine
56/// to clear the MBE related interrupts.
57#[inline(always)]
58pub fn clear_mbe_irq() {
59    // Safety: This function only clears SBE related IRQs
60    let syscfg = unsafe { pac::Sysconfig::steal() };
61    syscfg.irq_clr().write(|w| {
62        w.rommbe().set_bit();
63        w.ram0mbe().set_bit();
64        w.ram1mbe().set_bit()
65    });
66}
va416xx_hal/edac.rs

va416xx_hal/
edac.rs
