v853_pac/uart/
lcr.rs

1#[doc = "Register `lcr` reader"]
2pub struct R(crate::R<LCR_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<LCR_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<LCR_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<LCR_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `lcr` writer"]
17pub struct W(crate::W<LCR_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<LCR_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<LCR_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<LCR_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Divisor Latch Access Bit\n\nValue on reset: 0"]
38#[derive(Clone, Copy, Debug, PartialEq)]
39pub enum DLAB_A {
40    #[doc = "0: `0`"]
41    RX_BUFFER = 0,
42    #[doc = "1: `1`"]
43    DIVISOR_LATCH = 1,
44}
45impl From<DLAB_A> for bool {
46    #[inline(always)]
47    fn from(variant: DLAB_A) -> Self {
48        variant as u8 != 0
49    }
50}
51#[doc = "Field `dlab` reader - Divisor Latch Access Bit"]
52pub type DLAB_R = crate::BitReader<DLAB_A>;
53impl DLAB_R {
54    #[doc = "Get enumerated values variant"]
55    #[inline(always)]
56    pub fn variant(&self) -> DLAB_A {
57        match self.bits {
58            false => DLAB_A::RX_BUFFER,
59            true => DLAB_A::DIVISOR_LATCH,
60        }
61    }
62    #[doc = "Checks if the value of the field is `RX_BUFFER`"]
63    #[inline(always)]
64    pub fn is_rx_buffer(&self) -> bool {
65        *self == DLAB_A::RX_BUFFER
66    }
67    #[doc = "Checks if the value of the field is `DIVISOR_LATCH`"]
68    #[inline(always)]
69    pub fn is_divisor_latch(&self) -> bool {
70        *self == DLAB_A::DIVISOR_LATCH
71    }
72}
73#[doc = "Field `dlab` writer - Divisor Latch Access Bit"]
74pub type DLAB_W<'a, const O: u8> = crate::BitWriter<'a, u32, LCR_SPEC, DLAB_A, O>;
75impl<'a, const O: u8> DLAB_W<'a, O> {
76    #[doc = "`0`"]
77    #[inline(always)]
78    pub fn rx_buffer(self) -> &'a mut W {
79        self.variant(DLAB_A::RX_BUFFER)
80    }
81    #[doc = "`1`"]
82    #[inline(always)]
83    pub fn divisor_latch(self) -> &'a mut W {
84        self.variant(DLAB_A::DIVISOR_LATCH)
85    }
86}
87#[doc = "Field `bc` reader - Break Control Bit"]
88pub type BC_R = crate::BitReader<bool>;
89#[doc = "Field `bc` writer - Break Control Bit"]
90pub type BC_W<'a, const O: u8> = crate::BitWriter<'a, u32, LCR_SPEC, bool, O>;
91#[doc = "Even Parity Select\n\nValue on reset: 0"]
92#[derive(Clone, Copy, Debug, PartialEq)]
93#[repr(u8)]
94pub enum EPS_A {
95    #[doc = "0: `0`"]
96    ODD = 0,
97    #[doc = "1: `1`"]
98    EVEN = 1,
99    #[doc = "2: `10`"]
100    RS485_DATA = 2,
101    #[doc = "3: `11`"]
102    RS485_ADDR = 3,
103}
104impl From<EPS_A> for u8 {
105    #[inline(always)]
106    fn from(variant: EPS_A) -> Self {
107        variant as _
108    }
109}
110#[doc = "Field `eps` reader - Even Parity Select"]
111pub type EPS_R = crate::FieldReader<u8, EPS_A>;
112impl EPS_R {
113    #[doc = "Get enumerated values variant"]
114    #[inline(always)]
115    pub fn variant(&self) -> EPS_A {
116        match self.bits {
117            0 => EPS_A::ODD,
118            1 => EPS_A::EVEN,
119            2 => EPS_A::RS485_DATA,
120            3 => EPS_A::RS485_ADDR,
121            _ => unreachable!(),
122        }
123    }
124    #[doc = "Checks if the value of the field is `ODD`"]
125    #[inline(always)]
126    pub fn is_odd(&self) -> bool {
127        *self == EPS_A::ODD
128    }
129    #[doc = "Checks if the value of the field is `EVEN`"]
130    #[inline(always)]
131    pub fn is_even(&self) -> bool {
132        *self == EPS_A::EVEN
133    }
134    #[doc = "Checks if the value of the field is `RS485_DATA`"]
135    #[inline(always)]
136    pub fn is_rs485_data(&self) -> bool {
137        *self == EPS_A::RS485_DATA
138    }
139    #[doc = "Checks if the value of the field is `RS485_ADDR`"]
140    #[inline(always)]
141    pub fn is_rs485_addr(&self) -> bool {
142        *self == EPS_A::RS485_ADDR
143    }
144}
145#[doc = "Field `eps` writer - Even Parity Select"]
146pub type EPS_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, LCR_SPEC, u8, EPS_A, 2, O>;
147impl<'a, const O: u8> EPS_W<'a, O> {
148    #[doc = "`0`"]
149    #[inline(always)]
150    pub fn odd(self) -> &'a mut W {
151        self.variant(EPS_A::ODD)
152    }
153    #[doc = "`1`"]
154    #[inline(always)]
155    pub fn even(self) -> &'a mut W {
156        self.variant(EPS_A::EVEN)
157    }
158    #[doc = "`10`"]
159    #[inline(always)]
160    pub fn rs485_data(self) -> &'a mut W {
161        self.variant(EPS_A::RS485_DATA)
162    }
163    #[doc = "`11`"]
164    #[inline(always)]
165    pub fn rs485_addr(self) -> &'a mut W {
166        self.variant(EPS_A::RS485_ADDR)
167    }
168}
169#[doc = "Parity Enable\n\nValue on reset: 0"]
170#[derive(Clone, Copy, Debug, PartialEq)]
171pub enum PEN_A {
172    #[doc = "0: `0`"]
173    DISABLED = 0,
174    #[doc = "1: `1`"]
175    ENABLED = 1,
176}
177impl From<PEN_A> for bool {
178    #[inline(always)]
179    fn from(variant: PEN_A) -> Self {
180        variant as u8 != 0
181    }
182}
183#[doc = "Field `pen` reader - Parity Enable"]
184pub type PEN_R = crate::BitReader<PEN_A>;
185impl PEN_R {
186    #[doc = "Get enumerated values variant"]
187    #[inline(always)]
188    pub fn variant(&self) -> PEN_A {
189        match self.bits {
190            false => PEN_A::DISABLED,
191            true => PEN_A::ENABLED,
192        }
193    }
194    #[doc = "Checks if the value of the field is `DISABLED`"]
195    #[inline(always)]
196    pub fn is_disabled(&self) -> bool {
197        *self == PEN_A::DISABLED
198    }
199    #[doc = "Checks if the value of the field is `ENABLED`"]
200    #[inline(always)]
201    pub fn is_enabled(&self) -> bool {
202        *self == PEN_A::ENABLED
203    }
204}
205#[doc = "Field `pen` writer - Parity Enable"]
206pub type PEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, LCR_SPEC, PEN_A, O>;
207impl<'a, const O: u8> PEN_W<'a, O> {
208    #[doc = "`0`"]
209    #[inline(always)]
210    pub fn disabled(self) -> &'a mut W {
211        self.variant(PEN_A::DISABLED)
212    }
213    #[doc = "`1`"]
214    #[inline(always)]
215    pub fn enabled(self) -> &'a mut W {
216        self.variant(PEN_A::ENABLED)
217    }
218}
219#[doc = "Number of stop bits\n\nValue on reset: 0"]
220#[derive(Clone, Copy, Debug, PartialEq)]
221pub enum STOP_A {
222    #[doc = "0: 1 stop bit"]
223    ONE = 0,
224    #[doc = "1: 1.5 stop bits when DLS(LCR\\[1:0\\]) is zero, else 2 stop bits"]
225    TWO = 1,
226}
227impl From<STOP_A> for bool {
228    #[inline(always)]
229    fn from(variant: STOP_A) -> Self {
230        variant as u8 != 0
231    }
232}
233#[doc = "Field `stop` reader - Number of stop bits"]
234pub type STOP_R = crate::BitReader<STOP_A>;
235impl STOP_R {
236    #[doc = "Get enumerated values variant"]
237    #[inline(always)]
238    pub fn variant(&self) -> STOP_A {
239        match self.bits {
240            false => STOP_A::ONE,
241            true => STOP_A::TWO,
242        }
243    }
244    #[doc = "Checks if the value of the field is `ONE`"]
245    #[inline(always)]
246    pub fn is_one(&self) -> bool {
247        *self == STOP_A::ONE
248    }
249    #[doc = "Checks if the value of the field is `TWO`"]
250    #[inline(always)]
251    pub fn is_two(&self) -> bool {
252        *self == STOP_A::TWO
253    }
254}
255#[doc = "Field `stop` writer - Number of stop bits"]
256pub type STOP_W<'a, const O: u8> = crate::BitWriter<'a, u32, LCR_SPEC, STOP_A, O>;
257impl<'a, const O: u8> STOP_W<'a, O> {
258    #[doc = "1 stop bit"]
259    #[inline(always)]
260    pub fn one(self) -> &'a mut W {
261        self.variant(STOP_A::ONE)
262    }
263    #[doc = "1.5 stop bits when DLS(LCR\\[1:0\\]) is zero, else 2 stop bits"]
264    #[inline(always)]
265    pub fn two(self) -> &'a mut W {
266        self.variant(STOP_A::TWO)
267    }
268}
269#[doc = "Data Length Select\n\nValue on reset: 0"]
270#[derive(Clone, Copy, Debug, PartialEq)]
271#[repr(u8)]
272pub enum DLS_A {
273    #[doc = "0: 5 bits"]
274    FIVE = 0,
275    #[doc = "1: 6 bits"]
276    SIX = 1,
277    #[doc = "2: 7 bits"]
278    SEVEN = 2,
279    #[doc = "3: 8 bits"]
280    EIGHT = 3,
281}
282impl From<DLS_A> for u8 {
283    #[inline(always)]
284    fn from(variant: DLS_A) -> Self {
285        variant as _
286    }
287}
288#[doc = "Field `dls` reader - Data Length Select"]
289pub type DLS_R = crate::FieldReader<u8, DLS_A>;
290impl DLS_R {
291    #[doc = "Get enumerated values variant"]
292    #[inline(always)]
293    pub fn variant(&self) -> DLS_A {
294        match self.bits {
295            0 => DLS_A::FIVE,
296            1 => DLS_A::SIX,
297            2 => DLS_A::SEVEN,
298            3 => DLS_A::EIGHT,
299            _ => unreachable!(),
300        }
301    }
302    #[doc = "Checks if the value of the field is `FIVE`"]
303    #[inline(always)]
304    pub fn is_five(&self) -> bool {
305        *self == DLS_A::FIVE
306    }
307    #[doc = "Checks if the value of the field is `SIX`"]
308    #[inline(always)]
309    pub fn is_six(&self) -> bool {
310        *self == DLS_A::SIX
311    }
312    #[doc = "Checks if the value of the field is `SEVEN`"]
313    #[inline(always)]
314    pub fn is_seven(&self) -> bool {
315        *self == DLS_A::SEVEN
316    }
317    #[doc = "Checks if the value of the field is `EIGHT`"]
318    #[inline(always)]
319    pub fn is_eight(&self) -> bool {
320        *self == DLS_A::EIGHT
321    }
322}
323#[doc = "Field `dls` writer - Data Length Select"]
324pub type DLS_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, LCR_SPEC, u8, DLS_A, 2, O>;
325impl<'a, const O: u8> DLS_W<'a, O> {
326    #[doc = "5 bits"]
327    #[inline(always)]
328    pub fn five(self) -> &'a mut W {
329        self.variant(DLS_A::FIVE)
330    }
331    #[doc = "6 bits"]
332    #[inline(always)]
333    pub fn six(self) -> &'a mut W {
334        self.variant(DLS_A::SIX)
335    }
336    #[doc = "7 bits"]
337    #[inline(always)]
338    pub fn seven(self) -> &'a mut W {
339        self.variant(DLS_A::SEVEN)
340    }
341    #[doc = "8 bits"]
342    #[inline(always)]
343    pub fn eight(self) -> &'a mut W {
344        self.variant(DLS_A::EIGHT)
345    }
346}
347impl R {
348    #[doc = "Bit 7 - Divisor Latch Access Bit"]
349    #[inline(always)]
350    pub fn dlab(&self) -> DLAB_R {
351        DLAB_R::new(((self.bits >> 7) & 1) != 0)
352    }
353    #[doc = "Bit 6 - Break Control Bit"]
354    #[inline(always)]
355    pub fn bc(&self) -> BC_R {
356        BC_R::new(((self.bits >> 6) & 1) != 0)
357    }
358    #[doc = "Bits 4:5 - Even Parity Select"]
359    #[inline(always)]
360    pub fn eps(&self) -> EPS_R {
361        EPS_R::new(((self.bits >> 4) & 3) as u8)
362    }
363    #[doc = "Bit 3 - Parity Enable"]
364    #[inline(always)]
365    pub fn pen(&self) -> PEN_R {
366        PEN_R::new(((self.bits >> 3) & 1) != 0)
367    }
368    #[doc = "Bit 2 - Number of stop bits"]
369    #[inline(always)]
370    pub fn stop(&self) -> STOP_R {
371        STOP_R::new(((self.bits >> 2) & 1) != 0)
372    }
373    #[doc = "Bits 0:1 - Data Length Select"]
374    #[inline(always)]
375    pub fn dls(&self) -> DLS_R {
376        DLS_R::new((self.bits & 3) as u8)
377    }
378}
379impl W {
380    #[doc = "Bit 7 - Divisor Latch Access Bit"]
381    #[inline(always)]
382    pub fn dlab(&mut self) -> DLAB_W<7> {
383        DLAB_W::new(self)
384    }
385    #[doc = "Bit 6 - Break Control Bit"]
386    #[inline(always)]
387    pub fn bc(&mut self) -> BC_W<6> {
388        BC_W::new(self)
389    }
390    #[doc = "Bits 4:5 - Even Parity Select"]
391    #[inline(always)]
392    pub fn eps(&mut self) -> EPS_W<4> {
393        EPS_W::new(self)
394    }
395    #[doc = "Bit 3 - Parity Enable"]
396    #[inline(always)]
397    pub fn pen(&mut self) -> PEN_W<3> {
398        PEN_W::new(self)
399    }
400    #[doc = "Bit 2 - Number of stop bits"]
401    #[inline(always)]
402    pub fn stop(&mut self) -> STOP_W<2> {
403        STOP_W::new(self)
404    }
405    #[doc = "Bits 0:1 - Data Length Select"]
406    #[inline(always)]
407    pub fn dls(&mut self) -> DLS_W<0> {
408        DLS_W::new(self)
409    }
410    #[doc = "Writes raw bits to the register."]
411    #[inline(always)]
412    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
413        self.0.bits(bits);
414        self
415    }
416}
417#[doc = "UART Line Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lcr](index.html) module"]
418pub struct LCR_SPEC;
419impl crate::RegisterSpec for LCR_SPEC {
420    type Ux = u32;
421}
422#[doc = "`read()` method returns [lcr::R](R) reader structure"]
423impl crate::Readable for LCR_SPEC {
424    type Reader = R;
425}
426#[doc = "`write(|w| ..)` method takes [lcr::W](W) writer structure"]
427impl crate::Writable for LCR_SPEC {
428    type Writer = W;
429}
430#[doc = "`reset()` method sets lcr to value 0"]
431impl crate::Resettable for LCR_SPEC {
432    #[inline(always)]
433    fn reset_value() -> Self::Ux {
434        0
435    }
436}
v853_pac/uart/lcr.rs

v853_pac/uart/
lcr.rs
