v853_pac/uart/
halt.rs

1#[doc = "Register `halt` reader"]
2pub struct R(crate::R<HALT_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<HALT_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<HALT_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<HALT_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `halt` writer"]
17pub struct W(crate::W<HALT_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<HALT_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<HALT_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<HALT_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `pte` reader - The sending of TX_REQ"]
38pub type PTE_R = crate::BitReader<bool>;
39#[doc = "Field `pte` writer - The sending of TX_REQ"]
40pub type PTE_W<'a, const O: u8> = crate::BitWriter<'a, u32, HALT_SPEC, bool, O>;
41#[doc = "Field `dma_pte_rx` reader - The Transmission of RX_DRQ"]
42pub type DMA_PTE_RX_R = crate::BitReader<bool>;
43#[doc = "Field `dma_pte_rx` writer - The Transmission of RX_DRQ"]
44pub type DMA_PTE_RX_W<'a, const O: u8> = crate::BitWriter<'a, u32, HALT_SPEC, bool, O>;
45#[doc = "SIR RX Pulse Polarity Invert\n\nValue on reset: 0"]
46#[derive(Clone, Copy, Debug, PartialEq)]
47pub enum SIR_RX_INVERT_A {
48    #[doc = "0: `0`"]
49    NOT_INVERT = 0,
50    #[doc = "1: `1`"]
51    INVERT = 1,
52}
53impl From<SIR_RX_INVERT_A> for bool {
54    #[inline(always)]
55    fn from(variant: SIR_RX_INVERT_A) -> Self {
56        variant as u8 != 0
57    }
58}
59#[doc = "Field `sir_rx_invert` reader - SIR RX Pulse Polarity Invert"]
60pub type SIR_RX_INVERT_R = crate::BitReader<SIR_RX_INVERT_A>;
61impl SIR_RX_INVERT_R {
62    #[doc = "Get enumerated values variant"]
63    #[inline(always)]
64    pub fn variant(&self) -> SIR_RX_INVERT_A {
65        match self.bits {
66            false => SIR_RX_INVERT_A::NOT_INVERT,
67            true => SIR_RX_INVERT_A::INVERT,
68        }
69    }
70    #[doc = "Checks if the value of the field is `NOT_INVERT`"]
71    #[inline(always)]
72    pub fn is_not_invert(&self) -> bool {
73        *self == SIR_RX_INVERT_A::NOT_INVERT
74    }
75    #[doc = "Checks if the value of the field is `INVERT`"]
76    #[inline(always)]
77    pub fn is_invert(&self) -> bool {
78        *self == SIR_RX_INVERT_A::INVERT
79    }
80}
81#[doc = "Field `sir_rx_invert` writer - SIR RX Pulse Polarity Invert"]
82pub type SIR_RX_INVERT_W<'a, const O: u8> =
83    crate::BitWriter<'a, u32, HALT_SPEC, SIR_RX_INVERT_A, O>;
84impl<'a, const O: u8> SIR_RX_INVERT_W<'a, O> {
85    #[doc = "`0`"]
86    #[inline(always)]
87    pub fn not_invert(self) -> &'a mut W {
88        self.variant(SIR_RX_INVERT_A::NOT_INVERT)
89    }
90    #[doc = "`1`"]
91    #[inline(always)]
92    pub fn invert(self) -> &'a mut W {
93        self.variant(SIR_RX_INVERT_A::INVERT)
94    }
95}
96#[doc = "SIR TX Pulse Polarity Invert\n\nValue on reset: 0"]
97#[derive(Clone, Copy, Debug, PartialEq)]
98pub enum SIR_TX_INVERT_A {
99    #[doc = "0: `0`"]
100    NOT_INVERT = 0,
101    #[doc = "1: `1`"]
102    INVERT = 1,
103}
104impl From<SIR_TX_INVERT_A> for bool {
105    #[inline(always)]
106    fn from(variant: SIR_TX_INVERT_A) -> Self {
107        variant as u8 != 0
108    }
109}
110#[doc = "Field `sir_tx_invert` reader - SIR TX Pulse Polarity Invert"]
111pub type SIR_TX_INVERT_R = crate::BitReader<SIR_TX_INVERT_A>;
112impl SIR_TX_INVERT_R {
113    #[doc = "Get enumerated values variant"]
114    #[inline(always)]
115    pub fn variant(&self) -> SIR_TX_INVERT_A {
116        match self.bits {
117            false => SIR_TX_INVERT_A::NOT_INVERT,
118            true => SIR_TX_INVERT_A::INVERT,
119        }
120    }
121    #[doc = "Checks if the value of the field is `NOT_INVERT`"]
122    #[inline(always)]
123    pub fn is_not_invert(&self) -> bool {
124        *self == SIR_TX_INVERT_A::NOT_INVERT
125    }
126    #[doc = "Checks if the value of the field is `INVERT`"]
127    #[inline(always)]
128    pub fn is_invert(&self) -> bool {
129        *self == SIR_TX_INVERT_A::INVERT
130    }
131}
132#[doc = "Field `sir_tx_invert` writer - SIR TX Pulse Polarity Invert"]
133pub type SIR_TX_INVERT_W<'a, const O: u8> =
134    crate::BitWriter<'a, u32, HALT_SPEC, SIR_TX_INVERT_A, O>;
135impl<'a, const O: u8> SIR_TX_INVERT_W<'a, O> {
136    #[doc = "`0`"]
137    #[inline(always)]
138    pub fn not_invert(self) -> &'a mut W {
139        self.variant(SIR_TX_INVERT_A::NOT_INVERT)
140    }
141    #[doc = "`1`"]
142    #[inline(always)]
143    pub fn invert(self) -> &'a mut W {
144        self.variant(SIR_TX_INVERT_A::INVERT)
145    }
146}
147#[doc = "\n\nValue on reset: 0"]
148#[derive(Clone, Copy, Debug, PartialEq)]
149pub enum CHANGE_UPDATE_A {
150    #[doc = "0: `0`"]
151    FINISHED = 0,
152    #[doc = "1: `1`"]
153    UPDATE_TRIGGER = 1,
154}
155impl From<CHANGE_UPDATE_A> for bool {
156    #[inline(always)]
157    fn from(variant: CHANGE_UPDATE_A) -> Self {
158        variant as u8 != 0
159    }
160}
161#[doc = "Field `change_update` reader - "]
162pub type CHANGE_UPDATE_R = crate::BitReader<CHANGE_UPDATE_A>;
163impl CHANGE_UPDATE_R {
164    #[doc = "Get enumerated values variant"]
165    #[inline(always)]
166    pub fn variant(&self) -> CHANGE_UPDATE_A {
167        match self.bits {
168            false => CHANGE_UPDATE_A::FINISHED,
169            true => CHANGE_UPDATE_A::UPDATE_TRIGGER,
170        }
171    }
172    #[doc = "Checks if the value of the field is `FINISHED`"]
173    #[inline(always)]
174    pub fn is_finished(&self) -> bool {
175        *self == CHANGE_UPDATE_A::FINISHED
176    }
177    #[doc = "Checks if the value of the field is `UPDATE_TRIGGER`"]
178    #[inline(always)]
179    pub fn is_update_trigger(&self) -> bool {
180        *self == CHANGE_UPDATE_A::UPDATE_TRIGGER
181    }
182}
183#[doc = "Field `change_update` writer - "]
184pub type CHANGE_UPDATE_W<'a, const O: u8> =
185    crate::BitWriter<'a, u32, HALT_SPEC, CHANGE_UPDATE_A, O>;
186impl<'a, const O: u8> CHANGE_UPDATE_W<'a, O> {
187    #[doc = "`0`"]
188    #[inline(always)]
189    pub fn finished(self) -> &'a mut W {
190        self.variant(CHANGE_UPDATE_A::FINISHED)
191    }
192    #[doc = "`1`"]
193    #[inline(always)]
194    pub fn update_trigger(self) -> &'a mut W {
195        self.variant(CHANGE_UPDATE_A::UPDATE_TRIGGER)
196    }
197}
198#[doc = "\n\nValue on reset: 0"]
199#[derive(Clone, Copy, Debug, PartialEq)]
200pub enum CHCFG_AT_BUSY_A {
201    #[doc = "0: `0`"]
202    DISABLE = 0,
203    #[doc = "1: `1`"]
204    ENABLE = 1,
205}
206impl From<CHCFG_AT_BUSY_A> for bool {
207    #[inline(always)]
208    fn from(variant: CHCFG_AT_BUSY_A) -> Self {
209        variant as u8 != 0
210    }
211}
212#[doc = "Field `chcfg_at_busy` reader - "]
213pub type CHCFG_AT_BUSY_R = crate::BitReader<CHCFG_AT_BUSY_A>;
214impl CHCFG_AT_BUSY_R {
215    #[doc = "Get enumerated values variant"]
216    #[inline(always)]
217    pub fn variant(&self) -> CHCFG_AT_BUSY_A {
218        match self.bits {
219            false => CHCFG_AT_BUSY_A::DISABLE,
220            true => CHCFG_AT_BUSY_A::ENABLE,
221        }
222    }
223    #[doc = "Checks if the value of the field is `DISABLE`"]
224    #[inline(always)]
225    pub fn is_disable(&self) -> bool {
226        *self == CHCFG_AT_BUSY_A::DISABLE
227    }
228    #[doc = "Checks if the value of the field is `ENABLE`"]
229    #[inline(always)]
230    pub fn is_enable(&self) -> bool {
231        *self == CHCFG_AT_BUSY_A::ENABLE
232    }
233}
234#[doc = "Field `chcfg_at_busy` writer - "]
235pub type CHCFG_AT_BUSY_W<'a, const O: u8> =
236    crate::BitWriter<'a, u32, HALT_SPEC, CHCFG_AT_BUSY_A, O>;
237impl<'a, const O: u8> CHCFG_AT_BUSY_W<'a, O> {
238    #[doc = "`0`"]
239    #[inline(always)]
240    pub fn disable(self) -> &'a mut W {
241        self.variant(CHCFG_AT_BUSY_A::DISABLE)
242    }
243    #[doc = "`1`"]
244    #[inline(always)]
245    pub fn enable(self) -> &'a mut W {
246        self.variant(CHCFG_AT_BUSY_A::ENABLE)
247    }
248}
249#[doc = "\n\nValue on reset: 0"]
250#[derive(Clone, Copy, Debug, PartialEq)]
251pub enum HALT_TX_A {
252    #[doc = "0: `0`"]
253    DISABLED = 0,
254    #[doc = "1: `1`"]
255    ENABLED = 1,
256}
257impl From<HALT_TX_A> for bool {
258    #[inline(always)]
259    fn from(variant: HALT_TX_A) -> Self {
260        variant as u8 != 0
261    }
262}
263#[doc = "Field `halt_tx` reader - "]
264pub type HALT_TX_R = crate::BitReader<HALT_TX_A>;
265impl HALT_TX_R {
266    #[doc = "Get enumerated values variant"]
267    #[inline(always)]
268    pub fn variant(&self) -> HALT_TX_A {
269        match self.bits {
270            false => HALT_TX_A::DISABLED,
271            true => HALT_TX_A::ENABLED,
272        }
273    }
274    #[doc = "Checks if the value of the field is `DISABLED`"]
275    #[inline(always)]
276    pub fn is_disabled(&self) -> bool {
277        *self == HALT_TX_A::DISABLED
278    }
279    #[doc = "Checks if the value of the field is `ENABLED`"]
280    #[inline(always)]
281    pub fn is_enabled(&self) -> bool {
282        *self == HALT_TX_A::ENABLED
283    }
284}
285#[doc = "Field `halt_tx` writer - "]
286pub type HALT_TX_W<'a, const O: u8> = crate::BitWriter<'a, u32, HALT_SPEC, HALT_TX_A, O>;
287impl<'a, const O: u8> HALT_TX_W<'a, O> {
288    #[doc = "`0`"]
289    #[inline(always)]
290    pub fn disabled(self) -> &'a mut W {
291        self.variant(HALT_TX_A::DISABLED)
292    }
293    #[doc = "`1`"]
294    #[inline(always)]
295    pub fn enabled(self) -> &'a mut W {
296        self.variant(HALT_TX_A::ENABLED)
297    }
298}
299impl R {
300    #[doc = "Bit 7 - The sending of TX_REQ"]
301    #[inline(always)]
302    pub fn pte(&self) -> PTE_R {
303        PTE_R::new(((self.bits >> 7) & 1) != 0)
304    }
305    #[doc = "Bit 6 - The Transmission of RX_DRQ"]
306    #[inline(always)]
307    pub fn dma_pte_rx(&self) -> DMA_PTE_RX_R {
308        DMA_PTE_RX_R::new(((self.bits >> 6) & 1) != 0)
309    }
310    #[doc = "Bit 5 - SIR RX Pulse Polarity Invert"]
311    #[inline(always)]
312    pub fn sir_rx_invert(&self) -> SIR_RX_INVERT_R {
313        SIR_RX_INVERT_R::new(((self.bits >> 5) & 1) != 0)
314    }
315    #[doc = "Bit 4 - SIR TX Pulse Polarity Invert"]
316    #[inline(always)]
317    pub fn sir_tx_invert(&self) -> SIR_TX_INVERT_R {
318        SIR_TX_INVERT_R::new(((self.bits >> 4) & 1) != 0)
319    }
320    #[doc = "Bit 2"]
321    #[inline(always)]
322    pub fn change_update(&self) -> CHANGE_UPDATE_R {
323        CHANGE_UPDATE_R::new(((self.bits >> 2) & 1) != 0)
324    }
325    #[doc = "Bit 1"]
326    #[inline(always)]
327    pub fn chcfg_at_busy(&self) -> CHCFG_AT_BUSY_R {
328        CHCFG_AT_BUSY_R::new(((self.bits >> 1) & 1) != 0)
329    }
330    #[doc = "Bit 0"]
331    #[inline(always)]
332    pub fn halt_tx(&self) -> HALT_TX_R {
333        HALT_TX_R::new((self.bits & 1) != 0)
334    }
335}
336impl W {
337    #[doc = "Bit 7 - The sending of TX_REQ"]
338    #[inline(always)]
339    pub fn pte(&mut self) -> PTE_W<7> {
340        PTE_W::new(self)
341    }
342    #[doc = "Bit 6 - The Transmission of RX_DRQ"]
343    #[inline(always)]
344    pub fn dma_pte_rx(&mut self) -> DMA_PTE_RX_W<6> {
345        DMA_PTE_RX_W::new(self)
346    }
347    #[doc = "Bit 5 - SIR RX Pulse Polarity Invert"]
348    #[inline(always)]
349    pub fn sir_rx_invert(&mut self) -> SIR_RX_INVERT_W<5> {
350        SIR_RX_INVERT_W::new(self)
351    }
352    #[doc = "Bit 4 - SIR TX Pulse Polarity Invert"]
353    #[inline(always)]
354    pub fn sir_tx_invert(&mut self) -> SIR_TX_INVERT_W<4> {
355        SIR_TX_INVERT_W::new(self)
356    }
357    #[doc = "Bit 2"]
358    #[inline(always)]
359    pub fn change_update(&mut self) -> CHANGE_UPDATE_W<2> {
360        CHANGE_UPDATE_W::new(self)
361    }
362    #[doc = "Bit 1"]
363    #[inline(always)]
364    pub fn chcfg_at_busy(&mut self) -> CHCFG_AT_BUSY_W<1> {
365        CHCFG_AT_BUSY_W::new(self)
366    }
367    #[doc = "Bit 0"]
368    #[inline(always)]
369    pub fn halt_tx(&mut self) -> HALT_TX_W<0> {
370        HALT_TX_W::new(self)
371    }
372    #[doc = "Writes raw bits to the register."]
373    #[inline(always)]
374    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
375        self.0.bits(bits);
376        self
377    }
378}
379#[doc = "UART Halt TX Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [halt](index.html) module"]
380pub struct HALT_SPEC;
381impl crate::RegisterSpec for HALT_SPEC {
382    type Ux = u32;
383}
384#[doc = "`read()` method returns [halt::R](R) reader structure"]
385impl crate::Readable for HALT_SPEC {
386    type Reader = R;
387}
388#[doc = "`write(|w| ..)` method takes [halt::W](W) writer structure"]
389impl crate::Writable for HALT_SPEC {
390    type Writer = W;
391}
392#[doc = "`reset()` method sets halt to value 0"]
393impl crate::Resettable for HALT_SPEC {
394    #[inline(always)]
395    fn reset_value() -> Self::Ux {
396        0
397    }
398}
v853_pac/uart/halt.rs

v853_pac/uart/
halt.rs
