Module simd 

Bulk SIMD operations for the unsigned floating-point storage formats.

The scalar newtypes intentionally retain their precise, portable promote/compute/demote contract. SIMD is therefore exposed as an opt-in slice API: storage lanes are widened into native f32 (Uf16) or f64 (Uf32) vectors, computed there, and rounded back to the exact scalar encoding. Normal finite lanes take the register-only bit-expansion path; subnormals, infinities, NaNs, overflows, and negative results fall back to the scalar conversion for bit-for-bit compatibility.

This feature uses nightly portable_simd. The chosen lane widths follow the portable axnn-cpu tier: 128-bit F32/F64 vectors by default and 256-bit vectors when the crate is compiled with AVX2 or AVX-512 enabled.

Enums

SimdError

Invalid source/destination slice relationship passed to a bulk operation.

Constants

UF16_LANES

F32 lanes processed by the UF16 path in one vector operation.

UF32_LANES

F64 lanes processed by the UF32 path in one vector operation.

Functions

add_uf16

Elementwise Uf16 addition through native F32 SIMD lanes.

add_uf32

Elementwise Uf32 addition through native F64 SIMD lanes.

add_uf16e6m10

Elementwise Uf16E6M10 addition through native F32 SIMD lanes.

decode_uf16_to_f32

Decode packed Uf16 lanes to F32. Normal finite blocks use SIMD bit expansion.

decode_uf16e6m10_to_f32

Decode packed Uf16E6M10 lanes to F32.

decode_uf32_to_f64

Decode packed Uf32 lanes to F64. Normal finite blocks use SIMD bit expansion.

div_uf16

Elementwise Uf16 division through native F32 SIMD lanes.

div_uf32

Elementwise Uf32 division through native F64 SIMD lanes.

div_uf16e6m10

Elementwise Uf16E6M10 division through native F32 SIMD lanes.

encode_f32_to_uf16

Encode F32 lanes as Uf16 with the scalar constructor’s exact RNE behavior.

encode_f32_to_uf16e6m10

Encode F32 lanes as Uf16E6M10 with scalar-equivalent rounding.

encode_f64_to_uf32

Encode F64 lanes as Uf32 with the scalar constructor’s exact RNE behavior.

mul_uf16

Elementwise Uf16 multiplication through native F32 SIMD lanes.

mul_uf32

Elementwise Uf32 multiplication through native F64 SIMD lanes.

mul_uf16e6m10

Elementwise Uf16E6M10 multiplication through native F32 SIMD lanes.

sub_uf16

Elementwise Uf16 subtraction through native F32 SIMD lanes.

sub_uf32

Elementwise Uf32 subtraction through native F64 SIMD lanes.

sub_uf16e6m10

Elementwise Uf16E6M10 subtraction through native F32 SIMD lanes.