unicorn_engine_sys/
lib.rs

1#![allow(non_camel_case_types)]
2
3mod bindings;
4pub use bindings::*;
5
6impl uc_error {
7    /// Calls `op` if the result is Ok, otherwise returns the [`Err`] value of `self`.
8    pub fn and_then<U, F: FnOnce() -> Result<U, Self>>(self, op: F) -> Result<U, Self> {
9        if self == Self::OK { op() } else { Err(self) }
10    }
11
12    /// Returns `res` if the result is Ok, otherwise returns the [`Err`] value of `self`.
13    /// Arguments passed to this are eagerly evaluated; if you are passing the result
14    /// of a function call, it is recommended to use [`uc_error::and_then`] instead, as it's lazily
15    /// evaluated.
16    pub fn and<U>(self, res: Result<U, Self>) -> Result<U, Self> {
17        if self == Self::OK { res } else { Err(self) }
18    }
19}
20
21impl From<uc_error> for Result<(), uc_error> {
22    fn from(value: uc_error) -> Self {
23        if value == uc_error::OK {
24            Ok(())
25        } else {
26            Err(value)
27        }
28    }
29}
30
31impl core::fmt::Display for uc_error {
32    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
33        let error_raw_str = unsafe { uc_strerror(*self) };
34        let error_c_str = unsafe { core::ffi::CStr::from_ptr(error_raw_str) };
35        write!(f, "{}", error_c_str.to_str().unwrap())
36    }
37}
38
39impl core::error::Error for uc_error {}
40
41impl TryFrom<usize> for Arch {
42    type Error = uc_error;
43
44    fn try_from(v: usize) -> Result<Self, Self::Error> {
45        match v {
46            x if x == Self::ARM as usize => Ok(Self::ARM),
47            x if x == Self::ARM64 as usize => Ok(Self::ARM64),
48            x if x == Self::MIPS as usize => Ok(Self::MIPS),
49            x if x == Self::X86 as usize => Ok(Self::X86),
50            x if x == Self::PPC as usize => Ok(Self::PPC),
51            x if x == Self::SPARC as usize => Ok(Self::SPARC),
52            x if x == Self::M68K as usize => Ok(Self::M68K),
53            x if x == Self::RISCV as usize => Ok(Self::RISCV),
54            x if x == Self::S390X as usize => Ok(Self::S390X),
55            x if x == Self::TRICORE as usize => Ok(Self::TRICORE),
56            x if x == Self::MAX as usize => Ok(Self::MAX),
57            _ => Err(uc_error::ARCH),
58        }
59    }
60}
61
62impl TryFrom<i32> for Mode {
63    type Error = uc_error;
64
65    #[allow(clippy::cognitive_complexity)]
66    fn try_from(v: i32) -> Result<Self, Self::Error> {
67        match v {
68            x if x == Self::LITTLE_ENDIAN.0 as i32 => Ok(Self::LITTLE_ENDIAN),
69            x if x == Self::BIG_ENDIAN.0 as i32 => Ok(Self::BIG_ENDIAN),
70            x if x == Self::ARM.0 as i32 => Ok(Self::ARM),
71            x if x == Self::THUMB.0 as i32 => Ok(Self::THUMB),
72            x if x == Self::MCLASS.0 as i32 => Ok(Self::MCLASS),
73            x if x == Self::V8.0 as i32 => Ok(Self::V8),
74            x if x == Self::ARMBE8.0 as i32 => Ok(Self::ARMBE8),
75            x if x == Self::ARM926.0 as i32 => Ok(Self::ARM926),
76            x if x == Self::ARM946.0 as i32 => Ok(Self::ARM946),
77            x if x == Self::ARM1176.0 as i32 => Ok(Self::ARM1176),
78            x if x == Self::MICRO.0 as i32 => Ok(Self::MICRO),
79            x if x == Self::MIPS3.0 as i32 => Ok(Self::MIPS3),
80            x if x == Self::MIPS32R6.0 as i32 => Ok(Self::MIPS32R6),
81            x if x == Self::MIPS32.0 as i32 => Ok(Self::MIPS32),
82            x if x == Self::MIPS64.0 as i32 => Ok(Self::MIPS64),
83            x if x == Self::MODE_16.0 as i32 => Ok(Self::MODE_16),
84            x if x == Self::MODE_32.0 as i32 => Ok(Self::MODE_32),
85            x if x == Self::MODE_64.0 as i32 => Ok(Self::MODE_64),
86            x if x == Self::PPC32.0 as i32 => Ok(Self::PPC32),
87            x if x == Self::PPC64.0 as i32 => Ok(Self::PPC64),
88            x if x == Self::QPX.0 as i32 => Ok(Self::QPX),
89            x if x == Self::SPARC32.0 as i32 => Ok(Self::SPARC32),
90            x if x == Self::SPARC64.0 as i32 => Ok(Self::SPARC64),
91            x if x == Self::V9.0 as i32 => Ok(Self::V9),
92            x if x == Self::RISCV32.0 as i32 => Ok(Self::RISCV32),
93            x if x == Self::RISCV64.0 as i32 => Ok(Self::RISCV64),
94            _ => Err(uc_error::MODE),
95        }
96    }
97}
98
99impl HookType {
100    pub const MEM_UNMAPPED: Self =
101        Self(Self::MEM_READ_UNMAPPED.0 | Self::MEM_WRITE_UNMAPPED.0 | Self::MEM_FETCH_UNMAPPED.0);
102
103    pub const MEM_PROT: Self =
104        Self(Self::MEM_READ_PROT.0 | Self::MEM_WRITE_PROT.0 | Self::MEM_FETCH_PROT.0);
105
106    pub const MEM_VALID: Self = Self(Self::MEM_READ.0 | Self::MEM_WRITE.0 | Self::MEM_FETCH.0);
107
108    pub const MEM_READ_INVALID: Self = Self(Self::MEM_READ_UNMAPPED.0 | Self::MEM_READ_PROT.0);
109
110    pub const MEM_WRITE_INVALID: Self = Self(Self::MEM_WRITE_UNMAPPED.0 | Self::MEM_WRITE_PROT.0);
111
112    pub const MEM_FETCH_INVALID: Self = Self(Self::MEM_FETCH_UNMAPPED.0 | Self::MEM_FETCH_PROT.0);
113
114    pub const MEM_INVALID: Self =
115        Self(Self::MEM_READ_INVALID.0 | Self::MEM_WRITE_INVALID.0 | Self::MEM_FETCH_INVALID.0);
116
117    pub const MEM_ALL: Self = Self(Self::MEM_VALID.0 | Self::MEM_INVALID.0);
118}
119
120impl ControlType {
121    pub const IO_READ: Self = Self(1 << 31);
122
123    pub const IO_WRITE: Self = Self(1 << 30);
124}
125
126impl Default for RegisterARMCP {
127    fn default() -> Self {
128        Self::new()
129    }
130}
131
132impl RegisterARMCP {
133    #[must_use]
134    pub const fn new() -> Self {
135        Self {
136            cp: 0,
137            is64: 0,
138            sec: 0,
139            crn: 0,
140            crm: 0,
141            opc1: 0,
142            opc2: 0,
143            val: 0,
144        }
145    }
146
147    #[must_use]
148    pub const fn cp(mut self, cp: u32) -> Self {
149        self.cp = cp;
150        self
151    }
152
153    #[must_use]
154    pub const fn is64(mut self, is64: u32) -> Self {
155        self.is64 = is64;
156        self
157    }
158
159    #[must_use]
160    pub const fn sec(mut self, sec: u32) -> Self {
161        self.sec = sec;
162        self
163    }
164
165    #[must_use]
166    pub const fn crn(mut self, crn: u32) -> Self {
167        self.crn = crn;
168        self
169    }
170
171    #[must_use]
172    pub const fn crm(mut self, crm: u32) -> Self {
173        self.crm = crm;
174        self
175    }
176
177    #[must_use]
178    pub const fn opc1(mut self, opc1: u32) -> Self {
179        self.opc1 = opc1;
180        self
181    }
182
183    #[must_use]
184    pub const fn opc2(mut self, opc2: u32) -> Self {
185        self.opc2 = opc2;
186        self
187    }
188
189    #[must_use]
190    pub const fn val(mut self, val: u64) -> Self {
191        self.val = val;
192        self
193    }
194}
195
196impl Default for RegisterARM64CP {
197    fn default() -> Self {
198        Self::new()
199    }
200}
201
202impl RegisterARM64CP {
203    #[must_use]
204    pub const fn new() -> Self {
205        Self {
206            crn: 0,
207            crm: 0,
208            op0: 0,
209            op1: 0,
210            op2: 0,
211            val: 0,
212        }
213    }
214    #[must_use]
215    pub const fn crn(mut self, crn: u32) -> Self {
216        self.crn = crn;
217        self
218    }
219
220    #[must_use]
221    pub const fn crm(mut self, crm: u32) -> Self {
222        self.crm = crm;
223        self
224    }
225
226    #[must_use]
227    pub const fn op0(mut self, op0: u32) -> Self {
228        self.op0 = op0;
229        self
230    }
231
232    #[must_use]
233    pub const fn op1(mut self, op1: u32) -> Self {
234        self.op1 = op1;
235        self
236    }
237
238    #[must_use]
239    pub const fn op2(mut self, op2: u32) -> Self {
240        self.op2 = op2;
241        self
242    }
243
244    #[must_use]
245    pub const fn val(mut self, val: u64) -> Self {
246        self.val = val;
247        self
248    }
249}
250
251impl From<M68kCpuModel> for i32 {
252    fn from(value: M68kCpuModel) -> Self {
253        value as Self
254    }
255}
256
257impl From<&M68kCpuModel> for i32 {
258    fn from(value: &M68kCpuModel) -> Self {
259        *value as Self
260    }
261}
262
263impl From<X86CpuModel> for i32 {
264    fn from(value: X86CpuModel) -> Self {
265        value as Self
266    }
267}
268
269impl From<&X86CpuModel> for i32 {
270    fn from(value: &X86CpuModel) -> Self {
271        *value as Self
272    }
273}
274
275impl From<ArmCpuModel> for i32 {
276    fn from(value: ArmCpuModel) -> Self {
277        value as Self
278    }
279}
280
281impl From<&ArmCpuModel> for i32 {
282    fn from(value: &ArmCpuModel) -> Self {
283        *value as Self
284    }
285}
286
287impl From<Arm64CpuModel> for i32 {
288    fn from(value: Arm64CpuModel) -> Self {
289        value as Self
290    }
291}
292
293impl From<&Arm64CpuModel> for i32 {
294    fn from(value: &Arm64CpuModel) -> Self {
295        *value as Self
296    }
297}
298
299impl From<Mips32CpuModel> for i32 {
300    fn from(value: Mips32CpuModel) -> Self {
301        value as Self
302    }
303}
304
305impl From<&Mips32CpuModel> for i32 {
306    fn from(value: &Mips32CpuModel) -> Self {
307        *value as Self
308    }
309}
310
311impl From<Mips64CpuModel> for i32 {
312    fn from(value: Mips64CpuModel) -> Self {
313        value as Self
314    }
315}
316
317impl From<&Mips64CpuModel> for i32 {
318    fn from(value: &Mips64CpuModel) -> Self {
319        *value as Self
320    }
321}
322
323impl From<Sparc32CpuModel> for i32 {
324    fn from(value: Sparc32CpuModel) -> Self {
325        value as Self
326    }
327}
328
329impl From<&Sparc32CpuModel> for i32 {
330    fn from(value: &Sparc32CpuModel) -> Self {
331        *value as Self
332    }
333}
334
335impl From<Sparc64CpuModel> for i32 {
336    fn from(value: Sparc64CpuModel) -> Self {
337        value as Self
338    }
339}
340
341impl From<&Sparc64CpuModel> for i32 {
342    fn from(value: &Sparc64CpuModel) -> Self {
343        *value as Self
344    }
345}
346
347impl From<PpcCpuModel> for i32 {
348    fn from(value: PpcCpuModel) -> Self {
349        value as Self
350    }
351}
352
353impl From<&PpcCpuModel> for i32 {
354    fn from(value: &PpcCpuModel) -> Self {
355        *value as Self
356    }
357}
358
359impl From<Ppc64CpuModel> for i32 {
360    fn from(value: Ppc64CpuModel) -> Self {
361        value as Self
362    }
363}
364
365impl From<&Ppc64CpuModel> for i32 {
366    fn from(value: &Ppc64CpuModel) -> Self {
367        *value as Self
368    }
369}
370
371impl From<Riscv32CpuModel> for i32 {
372    fn from(value: Riscv32CpuModel) -> Self {
373        value as Self
374    }
375}
376
377impl From<&Riscv32CpuModel> for i32 {
378    fn from(value: &Riscv32CpuModel) -> Self {
379        *value as Self
380    }
381}
382
383impl From<Riscv64CpuModel> for i32 {
384    fn from(value: Riscv64CpuModel) -> Self {
385        value as Self
386    }
387}
388
389impl From<&Riscv64CpuModel> for i32 {
390    fn from(value: &Riscv64CpuModel) -> Self {
391        *value as Self
392    }
393}
394
395impl From<S390xCpuModel> for i32 {
396    fn from(value: S390xCpuModel) -> Self {
397        value as Self
398    }
399}
400
401impl From<&S390xCpuModel> for i32 {
402    fn from(value: &S390xCpuModel) -> Self {
403        *value as Self
404    }
405}
406
407impl From<TricoreCpuModel> for i32 {
408    fn from(value: TricoreCpuModel) -> Self {
409        value as Self
410    }
411}
412
413impl From<&TricoreCpuModel> for i32 {
414    fn from(value: &TricoreCpuModel) -> Self {
415        *value as Self
416    }
417}
418
419impl From<RegisterM68K> for i32 {
420    fn from(value: RegisterM68K) -> Self {
421        value as Self
422    }
423}
424
425impl From<RegisterX86> for i32 {
426    fn from(value: RegisterX86) -> Self {
427        value as Self
428    }
429}
430
431impl From<RegisterARM> for i32 {
432    fn from(value: RegisterARM) -> Self {
433        value as Self
434    }
435}
436
437impl From<RegisterARM64> for i32 {
438    fn from(value: RegisterARM64) -> Self {
439        value as Self
440    }
441}
442
443impl From<RegisterMIPS> for i32 {
444    fn from(value: RegisterMIPS) -> Self {
445        value as Self
446    }
447}
448
449impl From<RegisterSPARC> for i32 {
450    fn from(value: RegisterSPARC) -> Self {
451        value as Self
452    }
453}
454
455impl From<RegisterPPC> for i32 {
456    fn from(value: RegisterPPC) -> Self {
457        value as Self
458    }
459}
460
461impl From<RegisterRISCV> for i32 {
462    fn from(value: RegisterRISCV) -> Self {
463        value as Self
464    }
465}
466
467impl From<RegisterS390X> for i32 {
468    fn from(value: RegisterS390X) -> Self {
469        value as Self
470    }
471}
472
473impl From<RegisterTRICORE> for i32 {
474    fn from(value: RegisterTRICORE) -> Self {
475        value as Self
476    }
477}
unicorn_engine_sys/lib.rs

unicorn_engine_sys/
lib.rs
