ttkmd_if/tlb/
mod.rs

1// SPDX-FileCopyrightText: © 2023 Tenstorrent Inc.
2// SPDX-License-Identifier: Apache-2.0
3
4use crate::{PciDevice, PciError};
5
6mod blackhole;
7mod grayskull;
8mod wormhole;
9
10#[derive(Clone, Debug, Default, Hash, PartialEq)]
11#[repr(u8)]
12pub enum Ordering {
13    RELAXED = 0,
14    #[default]
15    STRICT = 1,
16    POSTED = 2,
17    PostedStrict = 3,
18    UNKNOWN(u8),
19}
20
21impl From<u8> for Ordering {
22    fn from(value: u8) -> Self {
23        match value {
24            0 => Self::RELAXED,
25            1 => Self::STRICT,
26            2 => Self::POSTED,
27            val => Self::UNKNOWN(val),
28        }
29    }
30}
31
32impl From<Ordering> for u8 {
33    fn from(value: Ordering) -> Self {
34        match value {
35            Ordering::RELAXED => 0,
36            Ordering::STRICT => 1,
37            Ordering::POSTED => 2,
38            Ordering::PostedStrict => 3,
39            Ordering::UNKNOWN(val) => val,
40        }
41    }
42}
43
44#[derive(Clone, Debug, Hash, PartialEq)]
45pub struct TlbStride {
46    pub stride_x: u8,
47    pub stride_y: u8,
48    pub quad_exclude_x: u8,
49    pub quad_exclude_y: u8,
50    pub quad_exclude_control: u8,
51    pub num_destinations: u8,
52}
53
54#[derive(Debug, Clone, Default)]
55pub struct Tlb {
56    pub local_offset: u64,
57    pub x_end: u8,
58    pub y_end: u8,
59    pub x_start: u8,
60    pub y_start: u8,
61    pub noc_sel: u8,
62    pub mcast: bool,
63    pub ordering: Ordering,
64    pub linked: bool,
65    pub use_static_vc: bool,
66    pub stream_header: bool,
67    pub static_vc: u8,
68
69    pub stride: Option<TlbStride>,
70}
71
72#[derive(Debug, Clone, PartialEq)]
73pub enum MemoryType {
74    Uc,
75    Wc,
76}
77
78#[derive(Debug)]
79pub struct TlbInfo {
80    pub count: u64,
81    pub size: u64,
82    pub memory_type: MemoryType,
83}
84
85pub struct DeviceTlbInfo {
86    pub device_id: u32,
87    pub total_count: u32,
88    pub tlb_config: Vec<TlbInfo>,
89}
90
91#[derive(Debug)]
92pub struct SpecificTlbInfo {
93    pub config_base: u64,
94    pub data_base: u64,
95    pub size: u64,
96    pub memory_type: MemoryType,
97}
98
99pub fn get_per_tlb_info(device: &PciDevice, index: u32) -> SpecificTlbInfo {
100    match device.arch {
101        crate::Arch::Grayskull => grayskull::get_specific_tlb_info(device, index),
102        crate::Arch::Wormhole => wormhole::get_specific_tlb_info(device, index),
103        crate::Arch::Blackhole => blackhole::get_specific_tlb_info(device, index),
104    }
105}
106
107pub fn get_tlb(device: &PciDevice, index: u32) -> Result<Tlb, PciError> {
108    match device.arch {
109        crate::Arch::Grayskull => grayskull::get_tlb(device, index),
110        crate::Arch::Wormhole => wormhole::get_tlb(device, index),
111        crate::Arch::Blackhole => blackhole::get_tlb(device, index),
112    }
113}
114
115pub fn setup_tlb(device: &mut PciDevice, index: u32, tlb: Tlb) -> Result<(u64, u64), PciError> {
116    match device.arch {
117        crate::Arch::Grayskull => grayskull::setup_tlb(device, index, tlb),
118        crate::Arch::Wormhole => wormhole::setup_tlb(device, index, tlb),
119        crate::Arch::Blackhole => blackhole::setup_tlb(device, index, tlb),
120    }
121}
122
123pub fn get_tlb_info(device: &PciDevice) -> DeviceTlbInfo {
124    match device.arch {
125        crate::Arch::Grayskull => grayskull::tlb_info(device),
126        crate::Arch::Wormhole => wormhole::tlb_info(device),
127        crate::Arch::Blackhole => blackhole::tlb_info(device),
128    }
129}
ttkmd_if/tlb/mod.rs

ttkmd_if/tlb/
mod.rs
