[−][src]Struct tm4c123x::uart0::RegisterBlock

#[repr(C)]
pub struct RegisterBlock {
    pub dr: DR,
    pub fr: FR,
    pub ilpr: ILPR,
    pub ibrd: IBRD,
    pub fbrd: FBRD,
    pub lcrh: LCRH,
    pub ctl: CTL,
    pub ifls: IFLS,
    pub im: IM,
    pub ris: RIS,
    pub mis: MIS,
    pub icr: ICR,
    pub dmactl: DMACTL,
    pub _9bitaddr: _9BITADDR,
    pub _9bitamask: _9BITAMASK,
    pub pp: PP,
    pub cc: CC,
    // some fields omitted
}

Register block

Fields

dr: DR

0x00 - UART Data

fr: FR

0x18 - UART Flag

ilpr: ILPR

0x20 - UART IrDA Low-Power Register

ibrd: IBRD

0x24 - UART Integer Baud-Rate Divisor

fbrd: FBRD

0x28 - UART Fractional Baud-Rate Divisor

lcrh: LCRH

0x2c - UART Line Control

ctl: CTL

0x30 - UART Control

ifls: IFLS

0x34 - UART Interrupt FIFO Level Select

im: IM

0x38 - UART Interrupt Mask

ris: RIS

0x3c - UART Raw Interrupt Status

mis: MIS

0x40 - UART Masked Interrupt Status

icr: ICR

0x44 - UART Interrupt Clear

dmactl: DMACTL

0x48 - UART DMA Control

_9bitaddr: _9BITADDR

0xa4 - UART 9-Bit Self Address

_9bitamask: _9BITAMASK

0xa8 - UART 9-Bit Self Address Mask

pp: PP

0xfc0 - UART Peripheral Properties

cc: CC

0xfc8 - UART Clock Configuration

Methods

impl RegisterBlock[src]

pub fn ecr(&self) -> &ECR[src]

0x04 - UART Receive Status/Error Clear

pub fn ecr_mut(&self) -> &mut ECR[src]

0x04 - UART Receive Status/Error Clear

pub fn rsr(&self) -> &RSR[src]

0x04 - UART Receive Status/Error Clear

pub fn rsr_mut(&self) -> &mut RSR[src]

0x04 - UART Receive Status/Error Clear

Auto Trait Implementations

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impl<T> From<T> for T[src]

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    U: Into<T>, [src]

type Error = Infallible

The type returned in the event of a conversion error.

impl<T, U> Into<U> for T where
    U: From<T>, [src]

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    U: TryFrom<T>, [src]

type Error = <U as TryFrom<T>>::Error

The type returned in the event of a conversion error.

impl<T> Borrow<T> for T where
    T: ?Sized, [src]

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    T: ?Sized, [src]

impl<T> Any for T where
    T: 'static + ?Sized, [src]

impl<T> Same<T> for T

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Should always be Self