Struct tm4c123x::i2c0::RegisterBlock
[−]
[src]
#[repr(C)]pub struct RegisterBlock { pub i2c_msa: I2C_MSA, pub i2c_mcs: I2C_MCS, pub i2c_mdr: I2C_MDR, pub i2c_mtpr: I2C_MTPR, pub i2c_mimr: I2C_MIMR, pub i2c_mris: I2C_MRIS, pub i2c_mmis: I2C_MMIS, pub i2c_micr: I2C_MICR, pub i2c_mcr: I2C_MCR, pub i2c_mclkocnt: I2C_MCLKOCNT, pub i2c_mbmon: I2C_MBMON, pub i2c_mcr2: I2C_MCR2, pub i2c_soar: I2C_SOAR, pub i2c_scsr: I2C_SCSR, pub i2c_sdr: I2C_SDR, pub i2c_simr: I2C_SIMR, pub i2c_sris: I2C_SRIS, pub i2c_smis: I2C_SMIS, pub i2c_sicr: I2C_SICR, pub i2c_soar2: I2C_SOAR2, pub i2c_sackctl: I2C_SACKCTL, pub i2c_pp: I2C_PP, pub i2c_pc: I2C_PC, // some fields omitted }
Register block
Fields
i2c_msa: I2C_MSA
0x00 - I2C Master Slave Address
i2c_mcs: I2C_MCS
0x04 - I2C Master Control/Status
i2c_mdr: I2C_MDR
0x08 - I2C Master Data
i2c_mtpr: I2C_MTPR
0x0c - I2C Master Timer Period
i2c_mimr: I2C_MIMR
0x10 - I2C Master Interrupt Mask
i2c_mris: I2C_MRIS
0x14 - I2C Master Raw Interrupt Status
i2c_mmis: I2C_MMIS
0x18 - I2C Master Masked Interrupt Status
i2c_micr: I2C_MICR
0x1c - I2C Master Interrupt Clear
i2c_mcr: I2C_MCR
0x20 - I2C Master Configuration
i2c_mclkocnt: I2C_MCLKOCNT
0x24 - I2C Master Clock Low Timeout Count
i2c_mbmon: I2C_MBMON
0x2c - I2C Master Bus Monitor
i2c_mcr2: I2C_MCR2
0x38 - I2C Master Configuration 2
i2c_soar: I2C_SOAR
0x800 - I2C Slave Own Address
i2c_scsr: I2C_SCSR
0x804 - I2C Slave Control/Status
i2c_sdr: I2C_SDR
0x808 - I2C Slave Data
i2c_simr: I2C_SIMR
0x80c - I2C Slave Interrupt Mask
i2c_sris: I2C_SRIS
0x810 - I2C Slave Raw Interrupt Status
i2c_smis: I2C_SMIS
0x814 - I2C Slave Masked Interrupt Status
i2c_sicr: I2C_SICR
0x818 - I2C Slave Interrupt Clear
i2c_soar2: I2C_SOAR2
0x81c - I2C Slave Own Address 2
i2c_sackctl: I2C_SACKCTL
0x820 - I2C Slave ACK Control
i2c_pp: I2C_PP
0xfc0 - I2C Peripheral Properties
i2c_pc: I2C_PC
0xfc4 - I2C Peripheral Configuration