Module lower_memory 

Wave-1 memory-family lowering — Cranelift IR memory ops to crate::lowered_ir::LoweredOp.

Handles the four memory opcodes from the Cranelift → dialect-mir mapping table:

Cranelift op	Lowering
load	LoweredOp::Load (device-pointer base)
store	LoweredOp::Store (device-pointer base)
stack_load	LoweredOp::StackAlloc (first touch) + Load
stack_store	LoweredOp::StackAlloc (first touch) + Store

Device-pointer translation

Cranelift load/store operate on guest linear-memory offsets. The lowered Load/Store operate on a device pointer. The wave-1 contract here is intentionally simple: the caller supplies a MemLowerContext::linear_memory_base — the SSA value id of the kernel’s device-resident linear-memory base pointer (kernel arg 0 by convention) — and the MemLowerContext::value_map threads the Cranelift base-value pointer through to a LoweredValueId. Wave 2 refines kernel-arg threading (resolving when the Cranelift base value itself was the linear-memory pointer vs. an interior pointer).

Stack-slot lazy alloca

PTX has no stack. Cranelift stack slots become SSA-local LoweredOp::StackAlloc ops; the downstream mem2reg pass promotes them to registers. To keep LoweredFunction minimal, the alloca is emitted lazily — the first stack_load/stack_store that touches a slot emits the StackAlloc and records the alloca’s pointer in MemLowerContext::stack_slot_map. Subsequent accesses to the same slot reuse the pointer.

Structs

MemLowerContext

Context threaded through the memory-family lowering.

Enums

MemLowerError

Errors produced by the memory-family lowering.

Functions

lower_memory_inst

Lower a Cranelift memory-family instruction (load / store / stack_load / stack_store) to one or more LoweredOps.