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Source - ADX
- Support ADX instructions.
- AES
- Enable AES instructions.
- AMX_AVX512
- Support AMX-AVX512 instructions.
- AMX_BF16
- Support AMX-BF16 instructions.
- AMX_COMPLEX
- Support AMX-COMPLEX instructions.
- AMX_FP8
- Support AMX-FP8 instructions.
- AMX_FP16
- Support AMX amx-fp16 instructions.
- AMX_INT8
- Support AMX-INT8 instructions.
- AMX_MOVRS
- Support AMX-MOVRS instructions.
- AMX_TILE
- Support AMX-TILE instructions.
- APXF
- Support extended general purpose register.
- AVX
- Enable AVX instructions.
- AVX2
- Enable AVX2 instructions.
- AVX10_1
- Support AVX10.1 instruction.
- AVX10_2
- Support AVX10.2 instruction.
- AVX512BF16
- Support bfloat16 floating point.
- AVX512BITALG
- Enable AVX-512 Bit Algorithms.
- AVX512BW
- Enable AVX-512 Byte and Word Instructions.
- AVX512CD
- Enable AVX-512 Conflict Detection Instructions.
- AVX512DQ
- Enable AVX-512 Doubleword and Quadword Instructions.
- AVX512F
- Enable AVX-512 instructions.
- AVX512FP16
- Support 16-bit floating point.
- AVX512IFMA
- Enable AVX-512 Integer Fused Multiple-Add.
- AVX512VBMI
- Enable AVX-512 Vector Byte Manipulation Instructions.
- AVX512VBMI2
- Enable AVX-512 further Vector Byte Manipulation Instructions.
- AVX512VL
- Enable AVX-512 Vector Length eXtensions.
- AVX512VNNI
- Enable AVX-512 Vector Neural Network Instructions.
- AVX512VP2INTERSECT
- Enable AVX-512 vp2intersect.
- AVX512VPOPCNTDQ
- Enable AVX-512 Population Count Instructions.
- AVXIFMA
- Enable AVX-IFMA.
- AVXNECONVERT
- Support AVX-NE-CONVERT instructions.
- AVXVNNI
- Support AVX_VNNI encoding.
- AVXVNNIINT8
- Enable AVX-VNNI-INT8.
- AVXVNNIINT16
- Enable AVX-VNNI-INT16.
- BMI1
- Support BMI instructions.
- BMI2
- Support BMI2 instructions.
- CLFLUSHOPT
- Flush A Cache Line Optimized.
- CMPXCHG16B
- 64-bit with cmpxchg16b (this is true for most x86-64 chips, but not the first AMD chips).
- CRT_STATIC
- Enables C Run-time Libraries to be statically linked.
- ERMSB
- REP MOVS/STOS are fast.
- F16C
- Support 16-bit floating point conversion instructions.
- FMA
- Enable three-operand fused multiple-add.
- FMA4
- Enable four-operand fused multiple-add.
- FXSR
- Support fxsave/fxrestore instructions.
- GFNI
- Enable Galois Field Arithmetic Instructions.
- KL
- Support Key Locker kl Instructions.
- LAHFSAHF
- Support LAHF and SAHF instructions in 64-bit mode.
- LZCNT
- Support LZCNT instruction.
- MOVBE
- Support MOVBE instruction.
- MOVRS
- Enable MOVRS.
- PCLMULQDQ
- Enable packed carry-less multiplication instructions.
- POPCNT
- Support POPCNT instruction.
- PRFCHW
- Support PRFCHW instructions.
- RDRAND
- Support RDRAND instruction.
- RDSEED
- Support RDSEED instruction.
- RTM
- Support RTM instructions.
- SHA
- Enable SHA instructions.
- SHA512
- Support SHA512 instructions.
- SM3
- Support SM3 instructions.
- SM4
- Support SM4 instructions.
- SSE
- Enable SSE instructions.
- SSE2
- Enable SSE2 instructions.
- SSE3
- Enable SSE3 instructions.
- SSE4A
- Support SSE 4a instructions.
- SSE4_1
- Enable SSE 4.1 instructions.
- SSE4_2
- Enable SSE 4.2 instructions.
- SSSE3
- Enable SSSE3 instructions.
- TBM
- Enable TBM instructions.
- VAES
- Promote selected AES instructions to AVX512/AVX registers.
- VPCLMULQDQ
- Enable vpclmulqdq instructions.
- WIDEKL
- Support Key Locker wide Instructions.
- X87
- Enable X87 float instructions.
- XOP
- Enable XOP instructions.
- XSAVE
- Support xsave instructions.
- XSAVEC
- Support xsavec instructions.
- XSAVEOPT
- Support xsaveopt instructions.
- XSAVES
- Support xsaves instructions.