Expand description
CLIP ViT-H/14 (laion/CLIP-ViT-H-14-laion2B-s32B-b79K) image and text
embeddings on an AMD XDNA NPU.
The bundle iron/applications/clip_vit_h14/export_clip.py writes holds
every compiled IRON kernel and the model’s weights (the NPU ones
pre-packed); this crate replays the forward the Python app runs:
| NPU | host (here) | |
|---|---|---|
| image | all 32 layers (tower.rs) | resize / crop / normalise (preprocess.rs), the patch embedding (f32), CLS + position embedding, pre- and post-LayerNorm, the projection |
| text | all 24 layers | BPE tokenizer, token + position embedding, final LayerNorm at the end token, the projection |
Clip::encode_images / Clip::encode_texts give the projected
embeddings, logits CLIP’s scaled cosine similarities.
Modules§
- npu
- The NPU side: every kernel of the bundle loaded once, kernels naming the same xclbin sharing its hardware context (8 in all, of NPU2’s 16), and the device buffers they run over.
- preprocess
- Image preprocessing, as HF’s
CLIPImageProcessor(torchvision backend): - tower
- One transformer tower on the device, as
iron/applications/clip_vit_h14/clip_npu.py’sNpuTower: per layer
Structs§
- Clip
- Config
- Model constants (the manifest’s
paramrecords). - Timing
- Wall time per stage, in first-seen order; NPU dispatch time is kept
under
npu:<kernel>.