Module standard_modules

Source

Structsยง

SRAnd
A compute module calculating in_a & in_b
SRNand
A compute module calculating !(in_a & in_b)
SRNor
A compute module calculating !(in_a | in_b)
SRNot
A compute module calculating !in_a
SROr
A compute module calculating in_a | in_b
SRXor
A compute module calculating in_a ^ in_b
TriState
A TriState buffer according to https://en.wikipedia.org/wiki/Three-state_logic If enable is false, output will be Z (high impedance). If enable is true, output will be input. If enable is Z or X, output will be X. Use this to write to buses.
TriStateArr
TriStateArrDef