synopsys_usb_otg/
lib.rs

1//! USB peripheral driver for Synopsys USB OTG peripherals.
2
3#![no_std]
4
5#[cfg(all(feature = "fs", feature = "hs"))]
6compile_error!("choose only one USB mode");
7
8#[cfg(not(any(feature = "fs", feature = "hs")))]
9compile_error!("select USB mode feature (fs/hs)");
10
11mod endpoint;
12mod endpoint_memory;
13
14mod target;
15
16/// USB peripheral driver.
17pub mod bus;
18
19pub use crate::bus::UsbBus;
20
21mod ral;
22mod transition;
23
24/// A trait for device-specific USB peripherals. Implement this to add support for a new hardware
25/// platform. Peripherals that have this trait must have the same register block as STM32 USB OTG
26/// peripherals.
27pub unsafe trait UsbPeripheral: Send + Sync {
28    /// Pointer to the register block
29    const REGISTERS: *const ();
30
31    /// true for High Speed variants of the peripheral, false for Full Speed
32    const HIGH_SPEED: bool;
33
34    /// FIFO size in 32-bit words
35    const FIFO_DEPTH_WORDS: usize;
36
37    /// Number of (bidirectional) endpoints
38    const ENDPOINT_COUNT: usize;
39
40    /// Enables USB device on its peripheral bus
41    fn enable();
42
43    /// AHB frequency in hertz
44    fn ahb_frequency_hz(&self) -> u32;
45
46    /// Returns PHY type that should be used for USB peripheral
47    fn phy_type(&self) -> PhyType {
48        PhyType::InternalFullSpeed
49    }
50
51    /// Performs initial setup of the internal high-speed PHY
52    ///
53    /// This function should turn on LDO and PLL and wait for PHY clock to become stable.
54    fn setup_internal_hs_phy(&self) {}
55}
56
57/// USB PHY type
58#[derive(Copy, Clone, Debug, Eq, PartialEq)]
59pub enum PhyType {
60    /// Internal Full-Speed PHY
61    ///
62    /// Available on most High-Speed peripherals.
63    InternalFullSpeed,
64    /// Internal High-Speed PHY
65    ///
66    /// Available on a few STM32 chips.
67    InternalHighSpeed,
68    /// External ULPI High-Speed PHY
69    ExternalHighSpeed,
70}
synopsys_usb_otg/lib.rs

synopsys_usb_otg/
lib.rs
