swm341_pac/sys/
pllcr.rs

1#[doc = "Register `PLLCR` reader"]
2pub struct R(crate::R<PLLCR_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<PLLCR_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<PLLCR_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<PLLCR_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `PLLCR` writer"]
17pub struct W(crate::W<PLLCR_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<PLLCR_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<PLLCR_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<PLLCR_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `OUTEN` reader - OUTEN field"]
38pub type OUTEN_R = crate::BitReader<bool>;
39#[doc = "Field `OUTEN` writer - OUTEN field"]
40pub type OUTEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, PLLCR_SPEC, bool, O>;
41#[doc = "Field `INSEL` reader - INSEL field"]
42pub type INSEL_R = crate::BitReader<bool>;
43#[doc = "Field `INSEL` writer - INSEL field"]
44pub type INSEL_W<'a, const O: u8> = crate::BitWriter<'a, u32, PLLCR_SPEC, bool, O>;
45#[doc = "Field `OFF` reader - OFF field"]
46pub type OFF_R = crate::BitReader<bool>;
47#[doc = "Field `OFF` writer - OFF field"]
48pub type OFF_W<'a, const O: u8> = crate::BitWriter<'a, u32, PLLCR_SPEC, bool, O>;
49#[doc = "Field `RST` reader - RST field"]
50pub type RST_R = crate::BitReader<bool>;
51#[doc = "Field `RST` writer - RST field"]
52pub type RST_W<'a, const O: u8> = crate::BitWriter<'a, u32, PLLCR_SPEC, bool, O>;
53impl R {
54    #[doc = "Bit 0 - OUTEN field"]
55    #[inline(always)]
56    pub fn outen(&self) -> OUTEN_R {
57        OUTEN_R::new((self.bits & 1) != 0)
58    }
59    #[doc = "Bit 1 - INSEL field"]
60    #[inline(always)]
61    pub fn insel(&self) -> INSEL_R {
62        INSEL_R::new(((self.bits >> 1) & 1) != 0)
63    }
64    #[doc = "Bit 2 - OFF field"]
65    #[inline(always)]
66    pub fn off(&self) -> OFF_R {
67        OFF_R::new(((self.bits >> 2) & 1) != 0)
68    }
69    #[doc = "Bit 3 - RST field"]
70    #[inline(always)]
71    pub fn rst(&self) -> RST_R {
72        RST_R::new(((self.bits >> 3) & 1) != 0)
73    }
74}
75impl W {
76    #[doc = "Bit 0 - OUTEN field"]
77    #[inline(always)]
78    pub fn outen(&mut self) -> OUTEN_W<0> {
79        OUTEN_W::new(self)
80    }
81    #[doc = "Bit 1 - INSEL field"]
82    #[inline(always)]
83    pub fn insel(&mut self) -> INSEL_W<1> {
84        INSEL_W::new(self)
85    }
86    #[doc = "Bit 2 - OFF field"]
87    #[inline(always)]
88    pub fn off(&mut self) -> OFF_W<2> {
89        OFF_W::new(self)
90    }
91    #[doc = "Bit 3 - RST field"]
92    #[inline(always)]
93    pub fn rst(&mut self) -> RST_W<3> {
94        RST_W::new(self)
95    }
96    #[doc = "Writes raw bits to the register."]
97    #[inline(always)]
98    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
99        self.0.bits(bits);
100        self
101    }
102}
103#[doc = "PLLCR register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pllcr](index.html) module"]
104pub struct PLLCR_SPEC;
105impl crate::RegisterSpec for PLLCR_SPEC {
106    type Ux = u32;
107}
108#[doc = "`read()` method returns [pllcr::R](R) reader structure"]
109impl crate::Readable for PLLCR_SPEC {
110    type Reader = R;
111}
112#[doc = "`write(|w| ..)` method takes [pllcr::W](W) writer structure"]
113impl crate::Writable for PLLCR_SPEC {
114    type Writer = W;
115}
116#[doc = "`reset()` method sets PLLCR to value 0"]
117impl crate::Resettable for PLLCR_SPEC {
118    #[inline(always)]
119    fn reset_value() -> Self::Ux {
120        0
121    }
122}
swm341_pac/sys/pllcr.rs

swm341_pac/sys/
pllcr.rs
