swm341_pac/sdramc/
cfg.rs

1#[doc = "Register `CFG` reader"]
2pub struct R(crate::R<CFG_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<CFG_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<CFG_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<CFG_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `CFG` writer"]
17pub struct W(crate::W<CFG_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<CFG_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<CFG_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<CFG_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `CLKDIV` reader - CLKDIV field"]
38pub type CLKDIV_R = crate::BitReader<bool>;
39#[doc = "Field `CLKDIV` writer - CLKDIV field"]
40pub type CLKDIV_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, bool, O>;
41#[doc = "Field `CASDELAY` reader - CASDELAY field"]
42pub type CASDELAY_R = crate::BitReader<bool>;
43#[doc = "Field `CASDELAY` writer - CASDELAY field"]
44pub type CASDELAY_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, bool, O>;
45#[doc = "Field `HIGHFREQ` reader - HIGHFREQ field"]
46pub type HIGHFREQ_R = crate::BitReader<bool>;
47#[doc = "Field `HIGHFREQ` writer - HIGHFREQ field"]
48pub type HIGHFREQ_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, bool, O>;
49#[doc = "Field `SIZE` reader - SIZE field"]
50pub type SIZE_R = crate::FieldReader<u8, u8>;
51#[doc = "Field `SIZE` writer - SIZE field"]
52pub type SIZE_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CFG_SPEC, u8, u8, 2, O>;
53impl R {
54    #[doc = "Bit 0 - CLKDIV field"]
55    #[inline(always)]
56    pub fn clkdiv(&self) -> CLKDIV_R {
57        CLKDIV_R::new((self.bits & 1) != 0)
58    }
59    #[doc = "Bit 1 - CASDELAY field"]
60    #[inline(always)]
61    pub fn casdelay(&self) -> CASDELAY_R {
62        CASDELAY_R::new(((self.bits >> 1) & 1) != 0)
63    }
64    #[doc = "Bit 2 - HIGHFREQ field"]
65    #[inline(always)]
66    pub fn highfreq(&self) -> HIGHFREQ_R {
67        HIGHFREQ_R::new(((self.bits >> 2) & 1) != 0)
68    }
69    #[doc = "Bits 3:4 - SIZE field"]
70    #[inline(always)]
71    pub fn size(&self) -> SIZE_R {
72        SIZE_R::new(((self.bits >> 3) & 3) as u8)
73    }
74}
75impl W {
76    #[doc = "Bit 0 - CLKDIV field"]
77    #[inline(always)]
78    pub fn clkdiv(&mut self) -> CLKDIV_W<0> {
79        CLKDIV_W::new(self)
80    }
81    #[doc = "Bit 1 - CASDELAY field"]
82    #[inline(always)]
83    pub fn casdelay(&mut self) -> CASDELAY_W<1> {
84        CASDELAY_W::new(self)
85    }
86    #[doc = "Bit 2 - HIGHFREQ field"]
87    #[inline(always)]
88    pub fn highfreq(&mut self) -> HIGHFREQ_W<2> {
89        HIGHFREQ_W::new(self)
90    }
91    #[doc = "Bits 3:4 - SIZE field"]
92    #[inline(always)]
93    pub fn size(&mut self) -> SIZE_W<3> {
94        SIZE_W::new(self)
95    }
96    #[doc = "Writes raw bits to the register."]
97    #[inline(always)]
98    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
99        self.0.bits(bits);
100        self
101    }
102}
103#[doc = "CFG register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
104pub struct CFG_SPEC;
105impl crate::RegisterSpec for CFG_SPEC {
106    type Ux = u32;
107}
108#[doc = "`read()` method returns [cfg::R](R) reader structure"]
109impl crate::Readable for CFG_SPEC {
110    type Reader = R;
111}
112#[doc = "`write(|w| ..)` method takes [cfg::W](W) writer structure"]
113impl crate::Writable for CFG_SPEC {
114    type Writer = W;
115}
116#[doc = "`reset()` method sets CFG to value 0"]
117impl crate::Resettable for CFG_SPEC {
118    #[inline(always)]
119    fn reset_value() -> Self::Ux {
120        0
121    }
122}
swm341_pac/sdramc/cfg.rs

swm341_pac/sdramc/
cfg.rs
