swm341_pac/lcd/
cr.rs

1#[doc = "Register `CR` reader"]
2pub struct R(crate::R<CR_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<CR_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<CR_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<CR_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `CR` writer"]
17pub struct W(crate::W<CR_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<CR_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<CR_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<CR_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `CLKDIV` reader - CLKDIV field"]
38pub type CLKDIV_R = crate::FieldReader<u8, u8>;
39#[doc = "Field `CLKDIV` writer - CLKDIV field"]
40pub type CLKDIV_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CR_SPEC, u8, u8, 6, O>;
41#[doc = "Field `CLKINV` reader - CLKINV field"]
42pub type CLKINV_R = crate::BitReader<bool>;
43#[doc = "Field `CLKINV` writer - CLKINV field"]
44pub type CLKINV_W<'a, const O: u8> = crate::BitWriter<'a, u32, CR_SPEC, bool, O>;
45#[doc = "Field `CLKALW` reader - CLKALW field"]
46pub type CLKALW_R = crate::BitReader<bool>;
47#[doc = "Field `CLKALW` writer - CLKALW field"]
48pub type CLKALW_W<'a, const O: u8> = crate::BitWriter<'a, u32, CR_SPEC, bool, O>;
49#[doc = "Field `BURSTEN` reader - BURSTEN field"]
50pub type BURSTEN_R = crate::BitReader<bool>;
51#[doc = "Field `BURSTEN` writer - BURSTEN field"]
52pub type BURSTEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CR_SPEC, bool, O>;
53#[doc = "Field `BURSTLEN` reader - BURSTLEN field"]
54pub type BURSTLEN_R = crate::BitReader<bool>;
55#[doc = "Field `BURSTLEN` writer - BURSTLEN field"]
56pub type BURSTLEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CR_SPEC, bool, O>;
57#[doc = "Field `AUTORESTA` reader - AUTORESTA field"]
58pub type AUTORESTA_R = crate::BitReader<bool>;
59#[doc = "Field `AUTORESTA` writer - AUTORESTA field"]
60pub type AUTORESTA_W<'a, const O: u8> = crate::BitWriter<'a, u32, CR_SPEC, bool, O>;
61#[doc = "Field `IMMRELOAD` reader - IMMRELOAD field"]
62pub type IMMRELOAD_R = crate::BitReader<bool>;
63#[doc = "Field `IMMRELOAD` writer - IMMRELOAD field"]
64pub type IMMRELOAD_W<'a, const O: u8> = crate::BitWriter<'a, u32, CR_SPEC, bool, O>;
65#[doc = "Field `VBPRELOAD` reader - VBPRELOAD field"]
66pub type VBPRELOAD_R = crate::BitReader<bool>;
67#[doc = "Field `VBPRELOAD` writer - VBPRELOAD field"]
68pub type VBPRELOAD_W<'a, const O: u8> = crate::BitWriter<'a, u32, CR_SPEC, bool, O>;
69#[doc = "Field `FORMAT` reader - FORMAT field"]
70pub type FORMAT_R = crate::BitReader<bool>;
71#[doc = "Field `FORMAT` writer - FORMAT field"]
72pub type FORMAT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CR_SPEC, bool, O>;
73#[doc = "Field `SEREN` reader - SEREN field"]
74pub type SEREN_R = crate::BitReader<bool>;
75#[doc = "Field `SEREN` writer - SEREN field"]
76pub type SEREN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CR_SPEC, bool, O>;
77#[doc = "Field `MPUEN` reader - MPUEN field"]
78pub type MPUEN_R = crate::BitReader<bool>;
79#[doc = "Field `MPUEN` writer - MPUEN field"]
80pub type MPUEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CR_SPEC, bool, O>;
81#[doc = "Field `VSYNCINV` reader - VSYNCINV field"]
82pub type VSYNCINV_R = crate::BitReader<bool>;
83#[doc = "Field `VSYNCINV` writer - VSYNCINV field"]
84pub type VSYNCINV_W<'a, const O: u8> = crate::BitWriter<'a, u32, CR_SPEC, bool, O>;
85#[doc = "Field `HSYNCINV` reader - HSYNCINV field"]
86pub type HSYNCINV_R = crate::BitReader<bool>;
87#[doc = "Field `HSYNCINV` writer - HSYNCINV field"]
88pub type HSYNCINV_W<'a, const O: u8> = crate::BitWriter<'a, u32, CR_SPEC, bool, O>;
89impl R {
90    #[doc = "Bits 0:5 - CLKDIV field"]
91    #[inline(always)]
92    pub fn clkdiv(&self) -> CLKDIV_R {
93        CLKDIV_R::new((self.bits & 0x3f) as u8)
94    }
95    #[doc = "Bit 6 - CLKINV field"]
96    #[inline(always)]
97    pub fn clkinv(&self) -> CLKINV_R {
98        CLKINV_R::new(((self.bits >> 6) & 1) != 0)
99    }
100    #[doc = "Bit 7 - CLKALW field"]
101    #[inline(always)]
102    pub fn clkalw(&self) -> CLKALW_R {
103        CLKALW_R::new(((self.bits >> 7) & 1) != 0)
104    }
105    #[doc = "Bit 8 - BURSTEN field"]
106    #[inline(always)]
107    pub fn bursten(&self) -> BURSTEN_R {
108        BURSTEN_R::new(((self.bits >> 8) & 1) != 0)
109    }
110    #[doc = "Bit 9 - BURSTLEN field"]
111    #[inline(always)]
112    pub fn burstlen(&self) -> BURSTLEN_R {
113        BURSTLEN_R::new(((self.bits >> 9) & 1) != 0)
114    }
115    #[doc = "Bit 13 - AUTORESTA field"]
116    #[inline(always)]
117    pub fn autoresta(&self) -> AUTORESTA_R {
118        AUTORESTA_R::new(((self.bits >> 13) & 1) != 0)
119    }
120    #[doc = "Bit 14 - IMMRELOAD field"]
121    #[inline(always)]
122    pub fn immreload(&self) -> IMMRELOAD_R {
123        IMMRELOAD_R::new(((self.bits >> 14) & 1) != 0)
124    }
125    #[doc = "Bit 15 - VBPRELOAD field"]
126    #[inline(always)]
127    pub fn vbpreload(&self) -> VBPRELOAD_R {
128        VBPRELOAD_R::new(((self.bits >> 15) & 1) != 0)
129    }
130    #[doc = "Bit 16 - FORMAT field"]
131    #[inline(always)]
132    pub fn format(&self) -> FORMAT_R {
133        FORMAT_R::new(((self.bits >> 16) & 1) != 0)
134    }
135    #[doc = "Bit 17 - SEREN field"]
136    #[inline(always)]
137    pub fn seren(&self) -> SEREN_R {
138        SEREN_R::new(((self.bits >> 17) & 1) != 0)
139    }
140    #[doc = "Bit 18 - MPUEN field"]
141    #[inline(always)]
142    pub fn mpuen(&self) -> MPUEN_R {
143        MPUEN_R::new(((self.bits >> 18) & 1) != 0)
144    }
145    #[doc = "Bit 19 - VSYNCINV field"]
146    #[inline(always)]
147    pub fn vsyncinv(&self) -> VSYNCINV_R {
148        VSYNCINV_R::new(((self.bits >> 19) & 1) != 0)
149    }
150    #[doc = "Bit 20 - HSYNCINV field"]
151    #[inline(always)]
152    pub fn hsyncinv(&self) -> HSYNCINV_R {
153        HSYNCINV_R::new(((self.bits >> 20) & 1) != 0)
154    }
155}
156impl W {
157    #[doc = "Bits 0:5 - CLKDIV field"]
158    #[inline(always)]
159    pub fn clkdiv(&mut self) -> CLKDIV_W<0> {
160        CLKDIV_W::new(self)
161    }
162    #[doc = "Bit 6 - CLKINV field"]
163    #[inline(always)]
164    pub fn clkinv(&mut self) -> CLKINV_W<6> {
165        CLKINV_W::new(self)
166    }
167    #[doc = "Bit 7 - CLKALW field"]
168    #[inline(always)]
169    pub fn clkalw(&mut self) -> CLKALW_W<7> {
170        CLKALW_W::new(self)
171    }
172    #[doc = "Bit 8 - BURSTEN field"]
173    #[inline(always)]
174    pub fn bursten(&mut self) -> BURSTEN_W<8> {
175        BURSTEN_W::new(self)
176    }
177    #[doc = "Bit 9 - BURSTLEN field"]
178    #[inline(always)]
179    pub fn burstlen(&mut self) -> BURSTLEN_W<9> {
180        BURSTLEN_W::new(self)
181    }
182    #[doc = "Bit 13 - AUTORESTA field"]
183    #[inline(always)]
184    pub fn autoresta(&mut self) -> AUTORESTA_W<13> {
185        AUTORESTA_W::new(self)
186    }
187    #[doc = "Bit 14 - IMMRELOAD field"]
188    #[inline(always)]
189    pub fn immreload(&mut self) -> IMMRELOAD_W<14> {
190        IMMRELOAD_W::new(self)
191    }
192    #[doc = "Bit 15 - VBPRELOAD field"]
193    #[inline(always)]
194    pub fn vbpreload(&mut self) -> VBPRELOAD_W<15> {
195        VBPRELOAD_W::new(self)
196    }
197    #[doc = "Bit 16 - FORMAT field"]
198    #[inline(always)]
199    pub fn format(&mut self) -> FORMAT_W<16> {
200        FORMAT_W::new(self)
201    }
202    #[doc = "Bit 17 - SEREN field"]
203    #[inline(always)]
204    pub fn seren(&mut self) -> SEREN_W<17> {
205        SEREN_W::new(self)
206    }
207    #[doc = "Bit 18 - MPUEN field"]
208    #[inline(always)]
209    pub fn mpuen(&mut self) -> MPUEN_W<18> {
210        MPUEN_W::new(self)
211    }
212    #[doc = "Bit 19 - VSYNCINV field"]
213    #[inline(always)]
214    pub fn vsyncinv(&mut self) -> VSYNCINV_W<19> {
215        VSYNCINV_W::new(self)
216    }
217    #[doc = "Bit 20 - HSYNCINV field"]
218    #[inline(always)]
219    pub fn hsyncinv(&mut self) -> HSYNCINV_W<20> {
220        HSYNCINV_W::new(self)
221    }
222    #[doc = "Writes raw bits to the register."]
223    #[inline(always)]
224    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
225        self.0.bits(bits);
226        self
227    }
228}
229#[doc = "CR register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cr](index.html) module"]
230pub struct CR_SPEC;
231impl crate::RegisterSpec for CR_SPEC {
232    type Ux = u32;
233}
234#[doc = "`read()` method returns [cr::R](R) reader structure"]
235impl crate::Readable for CR_SPEC {
236    type Reader = R;
237}
238#[doc = "`write(|w| ..)` method takes [cr::W](W) writer structure"]
239impl crate::Writable for CR_SPEC {
240    type Writer = W;
241}
242#[doc = "`reset()` method sets CR to value 0"]
243impl crate::Resettable for CR_SPEC {
244    #[inline(always)]
245    fn reset_value() -> Self::Ux {
246        0
247    }
248}