1#[doc = "Register `CACHE` reader"]
2pub struct R(crate::R<CACHE_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<CACHE_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<CACHE_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<CACHE_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `CACHE` writer"]
17pub struct W(crate::W<CACHE_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<CACHE_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<CACHE_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<CACHE_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `PROGEN` reader - PROGEN field"]
38pub type PROGEN_R = crate::BitReader<bool>;
39#[doc = "Field `PROGEN` writer - PROGEN field"]
40pub type PROGEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CACHE_SPEC, bool, O>;
41#[doc = "Field `CEN` reader - CEN field"]
42pub type CEN_R = crate::BitReader<bool>;
43#[doc = "Field `CEN` writer - CEN field"]
44pub type CEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CACHE_SPEC, bool, O>;
45#[doc = "Field `CPEN` reader - CPEN field"]
46pub type CPEN_R = crate::BitReader<bool>;
47#[doc = "Field `CPEN` writer - CPEN field"]
48pub type CPEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CACHE_SPEC, bool, O>;
49#[doc = "Field `CCLR` reader - CCLR field"]
50pub type CCLR_R = crate::BitReader<bool>;
51#[doc = "Field `CCLR` writer - CCLR field"]
52pub type CCLR_W<'a, const O: u8> = crate::BitWriter<'a, u32, CACHE_SPEC, bool, O>;
53impl R {
54 #[doc = "Bit 0 - PROGEN field"]
55 #[inline(always)]
56 pub fn progen(&self) -> PROGEN_R {
57 PROGEN_R::new((self.bits & 1) != 0)
58 }
59 #[doc = "Bit 16 - CEN field"]
60 #[inline(always)]
61 pub fn cen(&self) -> CEN_R {
62 CEN_R::new(((self.bits >> 16) & 1) != 0)
63 }
64 #[doc = "Bit 17 - CPEN field"]
65 #[inline(always)]
66 pub fn cpen(&self) -> CPEN_R {
67 CPEN_R::new(((self.bits >> 17) & 1) != 0)
68 }
69 #[doc = "Bit 18 - CCLR field"]
70 #[inline(always)]
71 pub fn cclr(&self) -> CCLR_R {
72 CCLR_R::new(((self.bits >> 18) & 1) != 0)
73 }
74}
75impl W {
76 #[doc = "Bit 0 - PROGEN field"]
77 #[inline(always)]
78 pub fn progen(&mut self) -> PROGEN_W<0> {
79 PROGEN_W::new(self)
80 }
81 #[doc = "Bit 16 - CEN field"]
82 #[inline(always)]
83 pub fn cen(&mut self) -> CEN_W<16> {
84 CEN_W::new(self)
85 }
86 #[doc = "Bit 17 - CPEN field"]
87 #[inline(always)]
88 pub fn cpen(&mut self) -> CPEN_W<17> {
89 CPEN_W::new(self)
90 }
91 #[doc = "Bit 18 - CCLR field"]
92 #[inline(always)]
93 pub fn cclr(&mut self) -> CCLR_W<18> {
94 CCLR_W::new(self)
95 }
96 #[doc = "Writes raw bits to the register."]
97 #[inline(always)]
98 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
99 self.0.bits(bits);
100 self
101 }
102}
103#[doc = "CACHE register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cache](index.html) module"]
104pub struct CACHE_SPEC;
105impl crate::RegisterSpec for CACHE_SPEC {
106 type Ux = u32;
107}
108#[doc = "`read()` method returns [cache::R](R) reader structure"]
109impl crate::Readable for CACHE_SPEC {
110 type Reader = R;
111}
112#[doc = "`write(|w| ..)` method takes [cache::W](W) writer structure"]
113impl crate::Writable for CACHE_SPEC {
114 type Writer = W;
115}
116#[doc = "`reset()` method sets CACHE to value 0"]
117impl crate::Resettable for CACHE_SPEC {
118 #[inline(always)]
119 fn reset_value() -> Self::Ux {
120 0
121 }
122}