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Module adaptive_rasp_batch

subetha_pointers

Module adaptive_rasp_batch 

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Expand description

RaspBatch<T> - structure-of-arrays (SoA) storage for bounds- checked pointers, designed for high-throughput SIMD batch validation.

Where RaspPointer<T> is an array-of-structures (AoS) 16-byte pointer that fits in one XMM register, RaspBatch<T> flips the layout: instead of storing the four fields (ptr, base, length, perms) packed in 16 bytes per pointer, it stores N pointers as four parallel Vecs. Each field’s values are contiguous in memory, so SIMD batch validation can load 4 consecutive ptrs into one YMM register via a single vmovdqu - no GPR→SIMD domain crossings, no per-call ABI prologue overhead, and the vpcmpgtq packed-quadword compare runs at its design speed.

§Memory layout

ptrs:    [u64, u64, u64, u64, ...]   (8 bytes per slot, contiguous)
bases:   [u64, u64, u64, u64, ...]
lengths: [u32, u32, u32, u32, ...]   (4 bytes per slot, contiguous)
perms:   [u32, u32, u32, u32, ...]   (sealed = high bit of u32)

All four Vecs share the same length; index i reads (ptrs[i], bases[i], lengths[i], perms[i]) as the i-th pointer.

§SIMD batch validation

check_read_all_avx2 validates the entire batch by processing 4 consecutive entries per loop iteration:

  1. vmovdqu ymm0, [ptrs+offset] - 4 u64 ptrs into one YMM
  2. vmovdqu ymm1, [bases+offset] - 4 u64 bases into one YMM
  3. vpcmpgtq ymm2, ymm1, ymm0 - parallel “base > ptr” check
  4. vmovdqu xmm3, [lengths+offset] - 4 u32 lengths into one XMM
  5. vpmovzxdq ymm3, xmm3 - zero-extend to 4 u64 lanes
  6. vpaddq ymm4, ymm1, ymm3 - region_end = base + length
  7. vpaddq ymm5, ymm0, [size_t] - access_end = ptr + size_of::<T>()
  8. vpcmpgtq ymm6, ymm5, ymm4 - parallel “access_end > region_end”
  9. vmovdqu xmm7, [perms+offset] - 4 u32 perms
  10. permission + sealed checks via SIMD masks

Total: ~12 SIMD instructions per 4 pointers = 3 instructions per pointer. The AoS path’s ~30 instructions per 4 pointers (12 vmovq GPR→SIMD crossings + 6 vpunpcklqdq + 3 vinserti128 + 2 vpcmpgtq) is folded into 12 contiguous-load + arithmetic instructions with zero domain crossings.

Structs§

RaspBatch
Structure-of-arrays storage for bounds-checked pointers.
RaspBatchIndex
Position-independent reference into a RaspBatch<T>.

Enums§

RaspError
Errors returned from RASP bounds / permission checks.
RaspPermission
Per-pointer permission flags. Multiple permissions OR together; the sealed bit lives at position 31 of the u32 perms field.