Expand description
Control register 2
Structs
Enums
7-bit Address Detection/4-bit Address Detection
Binary data inversion
Most significant bit first
RX pin active level inversion
STOP bits
Swap TX/RX pins
TX pin active level inversion
Type Definitions
Field ADDM7
reader - 7-bit Address Detection/4-bit Address Detection
Field ADDM7
writer - 7-bit Address Detection/4-bit Address Detection
Field ADD
reader - Address of the LPUART node
Field ADD
writer - Address of the LPUART node
Field DATAINV
reader - Binary data inversion
Field DATAINV
writer - Binary data inversion
Field MSBFIRST
reader - Most significant bit first
Field MSBFIRST
writer - Most significant bit first
Field RXINV
reader - RX pin active level inversion
Field RXINV
writer - RX pin active level inversion
Field STOP
reader - STOP bits
Field STOP
writer - STOP bits
Field SWAP
reader - Swap TX/RX pins
Field SWAP
writer - Swap TX/RX pins
Field TXINV
reader - TX pin active level inversion
Field TXINV
writer - TX pin active level inversion