Enum stm32wl::stm32wl5x_cm4::dmamux::c6cr::DMAREQ_ID_A

#[repr(u8)]
pub enum DMAREQ_ID_A {
    None,
    Dmamux1ReqGen0,
    Dmamux1ReqGen1,
    Dmamux1ReqGen2,
    Dmamux1ReqGen3,
    Adc,
    DatOut1,
    Spi1RxDma,
    Spi1TxDma,
    Spi2RxDma,
    Spi2TxDma,
    I2c1RxDma,
    I2c1TxDma,
    I2c2RxDma,
    I2c2TxDma,
    I2c3RxDma,
    I2c3TxDma,
    Usart1RxDma,
    Usart1TxDma,
    Usart2RxDma,
    Usart2TxDma,
    Lpuart1RxDma,
    Lpuart1TxDma,
    Tim1Ch1,
    Tim1Ch2,
    Tim1Ch3,
    Tim1Ch4,
    Tim1Up,
    Tim1Trig,
    Tim1Com,
    Tim2Ch1,
    Tim2Ch2,
    Tim2Ch3,
    Tim2Ch4,
    Tim2Up,
    Tim16Ch1,
    Tim16Up,
    Tim17Ch1,
    Tim17Up,
    AesIn,
    AesOut,
    SubghzspiRx,
    SubghzspiTx,
}

DMA request identification

Value on reset: 0

Variants

None

0: No signal selected as request input

Dmamux1ReqGen0

1: Signal dmamux1_req_gen0 selected as request input

Dmamux1ReqGen1

2: Signal dmamux1_req_gen1 selected as request input

Dmamux1ReqGen2

3: Signal dmamux1_req_gen2 selected as request input

Dmamux1ReqGen3

4: Signal dmamux1_req_gen3 selected as request input

Adc

5: Signal adc1_dma selected as request input

DatOut1

6: Signal dac_out1_dma selected as request input

Spi1RxDma

7: Signal spi1_rx_dma selected as request input

Spi1TxDma

8: Signal spi1_tx_dma selected as request input

Spi2RxDma

9: Signal spi2_rx_dma selected as request input

Spi2TxDma

10: Signal spi2_tx_dma selected as request input

I2c1RxDma

11: Signal i2c1_rx_dma selected as request input

I2c1TxDma

12: Signal i2c1_tx_dma selected as request input

I2c2RxDma

13: Signal i2c2_rx_dma selected as request input

I2c2TxDma

14: Signal i2c2_tx_dma selected as request input

I2c3RxDma

15: Signal i2c3_rx_dma selected as request input

I2c3TxDma

16: Signal i2c3_tx_dma selected as request input

Usart1RxDma

17: Signal usart1_rx_dma selected as request input

Usart1TxDma

18: Signal usart1_tx_dma selected as request input

Usart2RxDma

19: Signal usart2_rx_dma selected as request input

Usart2TxDma

20: Signal usart2_tx_dma selected as request input

Lpuart1RxDma

21: Signal lpuart1_rx_dma selected as request input

Lpuart1TxDma

22: Signal lpuart1_tx_dma selected as request input

Tim1Ch1

23: Signal tim1_ch1 selected as request input

Tim1Ch2

24: Signal tim1_ch2 selected as request input

Tim1Ch3

25: Signal tim1_ch3 selected as request input

Tim1Ch4

26: Signal tim1_ch4 selected as request input

Tim1Up

27: Signal tim1_up selected as request input

Tim1Trig

28: Signal tim1_trig selected as request input

Tim1Com

29: Signal tim1_com selected as request input

Tim2Ch1

30: Signal tim2_ch1 selected as request input

Tim2Ch2

31: Signal tim2_ch2 selected as request input

Tim2Ch3

32: Signal tim2_ch3 selected as request input

Tim2Ch4

33: Signal tim2_ch4 selected as request input

Tim2Up

34: Signal tim2_up selected as request input

Tim16Ch1

35: Signal tim16_ch1 selected as request input

Tim16Up

36: Signal tim16_up selected as request input

Tim17Ch1

37: Signal tim17_ch1 selected as request input

Tim17Up

38: Signal tim17_up selected as request input

AesIn

39: Signal aes_in selected as request input

AesOut

40: Signal aes_out selected as request input

SubghzspiRx

41: Signal subghzspi_rx selected as request input

SubghzspiTx

42: Signal subghzspi_tx selected as request input

Trait Implementations

impl Clone for DMAREQ_ID_A

fn clone(&self) -> DMAREQ_ID_A

Returns a copy of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Debug for DMAREQ_ID_A

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl From<DMAREQ_ID_A> for u8

fn from(variant: DMAREQ_ID_A) -> Self

Converts to this type from the input type.

impl PartialEq<DMAREQ_ID_A> for DMAREQ_ID_A

fn eq(&self, other: &DMAREQ_ID_A) -> bool

This method tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

This method tests for !=.

impl Copy for DMAREQ_ID_A

impl StructuralPartialEq for DMAREQ_ID_A