stm32wb_pac/tim2/
or.rs

1#[doc = "Reader of register OR"]
2pub type R = crate::R<u32, super::OR>;
3#[doc = "Writer for register OR"]
4pub type W = crate::W<u32, super::OR>;
5#[doc = "Register OR `reset()`'s with value 0"]
6impl crate::ResetValue for super::OR {
7    type Type = u32;
8    #[inline(always)]
9    fn reset_value() -> Self::Type {
10        0
11    }
12}
13#[doc = "Reader of field `TI4_RMP`"]
14pub type TI4_RMP_R = crate::R<u8, u8>;
15#[doc = "Write proxy for field `TI4_RMP`"]
16pub struct TI4_RMP_W<'a> {
17    w: &'a mut W,
18}
19impl<'a> TI4_RMP_W<'a> {
20    #[doc = r"Writes raw bits to the field"]
21    #[inline(always)]
22    pub unsafe fn bits(self, value: u8) -> &'a mut W {
23        self.w.bits = (self.w.bits & !(0x03 << 2)) | (((value as u32) & 0x03) << 2);
24        self.w
25    }
26}
27#[doc = "Reader of field `ETR_RMP`"]
28pub type ETR_RMP_R = crate::R<bool, bool>;
29#[doc = "Write proxy for field `ETR_RMP`"]
30pub struct ETR_RMP_W<'a> {
31    w: &'a mut W,
32}
33impl<'a> ETR_RMP_W<'a> {
34    #[doc = r"Sets the field bit"]
35    #[inline(always)]
36    pub fn set_bit(self) -> &'a mut W {
37        self.bit(true)
38    }
39    #[doc = r"Clears the field bit"]
40    #[inline(always)]
41    pub fn clear_bit(self) -> &'a mut W {
42        self.bit(false)
43    }
44    #[doc = r"Writes raw bits to the field"]
45    #[inline(always)]
46    pub fn bit(self, value: bool) -> &'a mut W {
47        self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1);
48        self.w
49    }
50}
51#[doc = "Reader of field `ITR_RMP`"]
52pub type ITR_RMP_R = crate::R<bool, bool>;
53#[doc = "Write proxy for field `ITR_RMP`"]
54pub struct ITR_RMP_W<'a> {
55    w: &'a mut W,
56}
57impl<'a> ITR_RMP_W<'a> {
58    #[doc = r"Sets the field bit"]
59    #[inline(always)]
60    pub fn set_bit(self) -> &'a mut W {
61        self.bit(true)
62    }
63    #[doc = r"Clears the field bit"]
64    #[inline(always)]
65    pub fn clear_bit(self) -> &'a mut W {
66        self.bit(false)
67    }
68    #[doc = r"Writes raw bits to the field"]
69    #[inline(always)]
70    pub fn bit(self, value: bool) -> &'a mut W {
71        self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01);
72        self.w
73    }
74}
75impl R {
76    #[doc = "Bits 2:3 - Input capture 4 remap"]
77    #[inline(always)]
78    pub fn ti4_rmp(&self) -> TI4_RMP_R {
79        TI4_RMP_R::new(((self.bits >> 2) & 0x03) as u8)
80    }
81    #[doc = "Bit 1 - External trigger remap"]
82    #[inline(always)]
83    pub fn etr_rmp(&self) -> ETR_RMP_R {
84        ETR_RMP_R::new(((self.bits >> 1) & 0x01) != 0)
85    }
86    #[doc = "Bit 0 - Internal trigger remap"]
87    #[inline(always)]
88    pub fn itr_rmp(&self) -> ITR_RMP_R {
89        ITR_RMP_R::new((self.bits & 0x01) != 0)
90    }
91}
92impl W {
93    #[doc = "Bits 2:3 - Input capture 4 remap"]
94    #[inline(always)]
95    pub fn ti4_rmp(&mut self) -> TI4_RMP_W {
96        TI4_RMP_W { w: self }
97    }
98    #[doc = "Bit 1 - External trigger remap"]
99    #[inline(always)]
100    pub fn etr_rmp(&mut self) -> ETR_RMP_W {
101        ETR_RMP_W { w: self }
102    }
103    #[doc = "Bit 0 - Internal trigger remap"]
104    #[inline(always)]
105    pub fn itr_rmp(&mut self) -> ITR_RMP_W {
106        ITR_RMP_W { w: self }
107    }
108}
stm32wb_pac/tim2/or.rs

stm32wb_pac/tim2/
or.rs
