stm32wb_pac/
syscfg.rs

1#[doc = r"Register block"]
2#[repr(C)]
3pub struct RegisterBlock {
4    #[doc = "0x00 - memory remap register"]
5    pub memrmp: MEMRMP,
6    #[doc = "0x04 - configuration register 1"]
7    pub cfgr1: CFGR1,
8    #[doc = "0x08 - external interrupt configuration register 1"]
9    pub exticr1: EXTICR1,
10    #[doc = "0x0c - external interrupt configuration register 2"]
11    pub exticr2: EXTICR2,
12    #[doc = "0x10 - external interrupt configuration register 3"]
13    pub exticr3: EXTICR3,
14    #[doc = "0x14 - external interrupt configuration register 4"]
15    pub exticr4: EXTICR4,
16    #[doc = "0x18 - SCSR"]
17    pub scsr: SCSR,
18    #[doc = "0x1c - CFGR2"]
19    pub cfgr2: CFGR2,
20    #[doc = "0x20 - SRAM2 write protection register"]
21    pub swpr: SWPR,
22    #[doc = "0x24 - SKR"]
23    pub skr: SKR,
24    #[doc = "0x28 - SRAM2 write protection register 2"]
25    pub swpr2: SWPR2,
26    #[doc = "0x2c - CPU1 interrupt mask register 1"]
27    pub imr1: IMR1,
28    #[doc = "0x30 - CPU1 interrupt mask register 2"]
29    pub imr2: IMR2,
30    #[doc = "0x34 - CPU2 interrupt mask register 1"]
31    pub c2imr1: C2IMR1,
32    #[doc = "0x38 - CPU2 interrupt mask register 1"]
33    pub c2imr2: C2IMR2,
34    #[doc = "0x3c - secure IP control register"]
35    pub sipcr: SIPCR,
36}
37#[doc = "memory remap register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [memrmp](memrmp) module"]
38pub type MEMRMP = crate::Reg<u32, _MEMRMP>;
39#[allow(missing_docs)]
40#[doc(hidden)]
41pub struct _MEMRMP;
42#[doc = "`read()` method returns [memrmp::R](memrmp::R) reader structure"]
43impl crate::Readable for MEMRMP {}
44#[doc = "`write(|w| ..)` method takes [memrmp::W](memrmp::W) writer structure"]
45impl crate::Writable for MEMRMP {}
46#[doc = "memory remap register"]
47pub mod memrmp;
48#[doc = "configuration register 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cfgr1](cfgr1) module"]
49pub type CFGR1 = crate::Reg<u32, _CFGR1>;
50#[allow(missing_docs)]
51#[doc(hidden)]
52pub struct _CFGR1;
53#[doc = "`read()` method returns [cfgr1::R](cfgr1::R) reader structure"]
54impl crate::Readable for CFGR1 {}
55#[doc = "`write(|w| ..)` method takes [cfgr1::W](cfgr1::W) writer structure"]
56impl crate::Writable for CFGR1 {}
57#[doc = "configuration register 1"]
58pub mod cfgr1;
59#[doc = "external interrupt configuration register 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [exticr1](exticr1) module"]
60pub type EXTICR1 = crate::Reg<u32, _EXTICR1>;
61#[allow(missing_docs)]
62#[doc(hidden)]
63pub struct _EXTICR1;
64#[doc = "`read()` method returns [exticr1::R](exticr1::R) reader structure"]
65impl crate::Readable for EXTICR1 {}
66#[doc = "`write(|w| ..)` method takes [exticr1::W](exticr1::W) writer structure"]
67impl crate::Writable for EXTICR1 {}
68#[doc = "external interrupt configuration register 1"]
69pub mod exticr1;
70#[doc = "external interrupt configuration register 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [exticr2](exticr2) module"]
71pub type EXTICR2 = crate::Reg<u32, _EXTICR2>;
72#[allow(missing_docs)]
73#[doc(hidden)]
74pub struct _EXTICR2;
75#[doc = "`read()` method returns [exticr2::R](exticr2::R) reader structure"]
76impl crate::Readable for EXTICR2 {}
77#[doc = "`write(|w| ..)` method takes [exticr2::W](exticr2::W) writer structure"]
78impl crate::Writable for EXTICR2 {}
79#[doc = "external interrupt configuration register 2"]
80pub mod exticr2;
81#[doc = "external interrupt configuration register 3\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [exticr3](exticr3) module"]
82pub type EXTICR3 = crate::Reg<u32, _EXTICR3>;
83#[allow(missing_docs)]
84#[doc(hidden)]
85pub struct _EXTICR3;
86#[doc = "`read()` method returns [exticr3::R](exticr3::R) reader structure"]
87impl crate::Readable for EXTICR3 {}
88#[doc = "`write(|w| ..)` method takes [exticr3::W](exticr3::W) writer structure"]
89impl crate::Writable for EXTICR3 {}
90#[doc = "external interrupt configuration register 3"]
91pub mod exticr3;
92#[doc = "external interrupt configuration register 4\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [exticr4](exticr4) module"]
93pub type EXTICR4 = crate::Reg<u32, _EXTICR4>;
94#[allow(missing_docs)]
95#[doc(hidden)]
96pub struct _EXTICR4;
97#[doc = "`read()` method returns [exticr4::R](exticr4::R) reader structure"]
98impl crate::Readable for EXTICR4 {}
99#[doc = "`write(|w| ..)` method takes [exticr4::W](exticr4::W) writer structure"]
100impl crate::Writable for EXTICR4 {}
101#[doc = "external interrupt configuration register 4"]
102pub mod exticr4;
103#[doc = "SCSR\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [scsr](scsr) module"]
104pub type SCSR = crate::Reg<u32, _SCSR>;
105#[allow(missing_docs)]
106#[doc(hidden)]
107pub struct _SCSR;
108#[doc = "`read()` method returns [scsr::R](scsr::R) reader structure"]
109impl crate::Readable for SCSR {}
110#[doc = "`write(|w| ..)` method takes [scsr::W](scsr::W) writer structure"]
111impl crate::Writable for SCSR {}
112#[doc = "SCSR"]
113pub mod scsr;
114#[doc = "CFGR2\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cfgr2](cfgr2) module"]
115pub type CFGR2 = crate::Reg<u32, _CFGR2>;
116#[allow(missing_docs)]
117#[doc(hidden)]
118pub struct _CFGR2;
119#[doc = "`read()` method returns [cfgr2::R](cfgr2::R) reader structure"]
120impl crate::Readable for CFGR2 {}
121#[doc = "`write(|w| ..)` method takes [cfgr2::W](cfgr2::W) writer structure"]
122impl crate::Writable for CFGR2 {}
123#[doc = "CFGR2"]
124pub mod cfgr2;
125#[doc = "SRAM2 write protection register\n\nThis register you can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [swpr](swpr) module"]
126pub type SWPR = crate::Reg<u32, _SWPR>;
127#[allow(missing_docs)]
128#[doc(hidden)]
129pub struct _SWPR;
130#[doc = "`write(|w| ..)` method takes [swpr::W](swpr::W) writer structure"]
131impl crate::Writable for SWPR {}
132#[doc = "SRAM2 write protection register"]
133pub mod swpr;
134#[doc = "SKR\n\nThis register you can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [skr](skr) module"]
135pub type SKR = crate::Reg<u32, _SKR>;
136#[allow(missing_docs)]
137#[doc(hidden)]
138pub struct _SKR;
139#[doc = "`write(|w| ..)` method takes [skr::W](skr::W) writer structure"]
140impl crate::Writable for SKR {}
141#[doc = "SKR"]
142pub mod skr;
143#[doc = "SRAM2 write protection register 2\n\nThis register you can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [swpr2](swpr2) module"]
144pub type SWPR2 = crate::Reg<u32, _SWPR2>;
145#[allow(missing_docs)]
146#[doc(hidden)]
147pub struct _SWPR2;
148#[doc = "`write(|w| ..)` method takes [swpr2::W](swpr2::W) writer structure"]
149impl crate::Writable for SWPR2 {}
150#[doc = "SRAM2 write protection register 2"]
151pub mod swpr2;
152#[doc = "CPU1 interrupt mask register 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [imr1](imr1) module"]
153pub type IMR1 = crate::Reg<u32, _IMR1>;
154#[allow(missing_docs)]
155#[doc(hidden)]
156pub struct _IMR1;
157#[doc = "`read()` method returns [imr1::R](imr1::R) reader structure"]
158impl crate::Readable for IMR1 {}
159#[doc = "`write(|w| ..)` method takes [imr1::W](imr1::W) writer structure"]
160impl crate::Writable for IMR1 {}
161#[doc = "CPU1 interrupt mask register 1"]
162pub mod imr1;
163#[doc = "CPU1 interrupt mask register 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [imr2](imr2) module"]
164pub type IMR2 = crate::Reg<u32, _IMR2>;
165#[allow(missing_docs)]
166#[doc(hidden)]
167pub struct _IMR2;
168#[doc = "`read()` method returns [imr2::R](imr2::R) reader structure"]
169impl crate::Readable for IMR2 {}
170#[doc = "`write(|w| ..)` method takes [imr2::W](imr2::W) writer structure"]
171impl crate::Writable for IMR2 {}
172#[doc = "CPU1 interrupt mask register 2"]
173pub mod imr2;
174#[doc = "CPU2 interrupt mask register 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [c2imr1](c2imr1) module"]
175pub type C2IMR1 = crate::Reg<u32, _C2IMR1>;
176#[allow(missing_docs)]
177#[doc(hidden)]
178pub struct _C2IMR1;
179#[doc = "`read()` method returns [c2imr1::R](c2imr1::R) reader structure"]
180impl crate::Readable for C2IMR1 {}
181#[doc = "`write(|w| ..)` method takes [c2imr1::W](c2imr1::W) writer structure"]
182impl crate::Writable for C2IMR1 {}
183#[doc = "CPU2 interrupt mask register 1"]
184pub mod c2imr1;
185#[doc = "CPU2 interrupt mask register 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [c2imr2](c2imr2) module"]
186pub type C2IMR2 = crate::Reg<u32, _C2IMR2>;
187#[allow(missing_docs)]
188#[doc(hidden)]
189pub struct _C2IMR2;
190#[doc = "`read()` method returns [c2imr2::R](c2imr2::R) reader structure"]
191impl crate::Readable for C2IMR2 {}
192#[doc = "`write(|w| ..)` method takes [c2imr2::W](c2imr2::W) writer structure"]
193impl crate::Writable for C2IMR2 {}
194#[doc = "CPU2 interrupt mask register 1"]
195pub mod c2imr2;
196#[doc = "secure IP control register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sipcr](sipcr) module"]
197pub type SIPCR = crate::Reg<u32, _SIPCR>;
198#[allow(missing_docs)]
199#[doc(hidden)]
200pub struct _SIPCR;
201#[doc = "`read()` method returns [sipcr::R](sipcr::R) reader structure"]
202impl crate::Readable for SIPCR {}
203#[doc = "`write(|w| ..)` method takes [sipcr::W](sipcr::W) writer structure"]
204impl crate::Writable for SIPCR {}
205#[doc = "secure IP control register"]
206pub mod sipcr;
stm32wb_pac/syscfg.rs

stm32wb_pac/
syscfg.rs
