1#[doc = r"Register block"]
2#[repr(C)]
3pub struct RegisterBlock {
4 #[doc = "0x00 - control register 1"]
5 pub cr1: CR1,
6 #[doc = "0x04 - control register 2"]
7 pub cr2: CR2,
8 _reserved2: [u8; 4usize],
9 #[doc = "0x0c - DMA/Interrupt enable register"]
10 pub dier: DIER,
11 #[doc = "0x10 - status register"]
12 pub sr: SR,
13 #[doc = "0x14 - event generation register"]
14 pub egr: EGR,
15 _reserved_5_ccmr1: [u8; 4usize],
16 _reserved6: [u8; 4usize],
17 #[doc = "0x20 - capture/compare enable register"]
18 pub ccer: CCER,
19 #[doc = "0x24 - counter"]
20 pub cnt: CNT,
21 #[doc = "0x28 - prescaler"]
22 pub psc: PSC,
23 #[doc = "0x2c - auto-reload register"]
24 pub arr: ARR,
25 #[doc = "0x30 - repetition counter register"]
26 pub rcr: RCR,
27 #[doc = "0x34 - capture/compare register 1"]
28 pub ccr1: CCR1,
29 _reserved12: [u8; 12usize],
30 #[doc = "0x44 - break and dead-time register"]
31 pub bdtr: BDTR,
32 #[doc = "0x48 - DMA control register"]
33 pub dcr: DCR,
34 #[doc = "0x4c - DMA address for full transfer"]
35 pub dmar: DMAR,
36 #[doc = "0x50 - TIM16 option register 1"]
37 pub or: OR,
38 _reserved16: [u8; 12usize],
39 #[doc = "0x60 - TIM17 option register 1"]
40 pub af1: AF1,
41}
42impl RegisterBlock {
43 #[doc = "0x18 - capture/compare mode register 1 (input mode)"]
44 #[inline(always)]
45 pub fn ccmr1_input(&self) -> &CCMR1_INPUT {
46 unsafe { &*(((self as *const Self) as *const u8).add(24usize) as *const CCMR1_INPUT) }
47 }
48 #[doc = "0x18 - capture/compare mode register 1 (input mode)"]
49 #[inline(always)]
50 pub fn ccmr1_input_mut(&self) -> &mut CCMR1_INPUT {
51 unsafe { &mut *(((self as *const Self) as *mut u8).add(24usize) as *mut CCMR1_INPUT) }
52 }
53 #[doc = "0x18 - capture/compare mode register (output mode)"]
54 #[inline(always)]
55 pub fn ccmr1_output(&self) -> &CCMR1_OUTPUT {
56 unsafe { &*(((self as *const Self) as *const u8).add(24usize) as *const CCMR1_OUTPUT) }
57 }
58 #[doc = "0x18 - capture/compare mode register (output mode)"]
59 #[inline(always)]
60 pub fn ccmr1_output_mut(&self) -> &mut CCMR1_OUTPUT {
61 unsafe { &mut *(((self as *const Self) as *mut u8).add(24usize) as *mut CCMR1_OUTPUT) }
62 }
63}
64#[doc = "control register 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cr1](cr1) module"]
65pub type CR1 = crate::Reg<u32, _CR1>;
66#[allow(missing_docs)]
67#[doc(hidden)]
68pub struct _CR1;
69#[doc = "`read()` method returns [cr1::R](cr1::R) reader structure"]
70impl crate::Readable for CR1 {}
71#[doc = "`write(|w| ..)` method takes [cr1::W](cr1::W) writer structure"]
72impl crate::Writable for CR1 {}
73#[doc = "control register 1"]
74pub mod cr1;
75#[doc = "control register 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cr2](cr2) module"]
76pub type CR2 = crate::Reg<u32, _CR2>;
77#[allow(missing_docs)]
78#[doc(hidden)]
79pub struct _CR2;
80#[doc = "`read()` method returns [cr2::R](cr2::R) reader structure"]
81impl crate::Readable for CR2 {}
82#[doc = "`write(|w| ..)` method takes [cr2::W](cr2::W) writer structure"]
83impl crate::Writable for CR2 {}
84#[doc = "control register 2"]
85pub mod cr2;
86#[doc = "DMA/Interrupt enable register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dier](dier) module"]
87pub type DIER = crate::Reg<u32, _DIER>;
88#[allow(missing_docs)]
89#[doc(hidden)]
90pub struct _DIER;
91#[doc = "`read()` method returns [dier::R](dier::R) reader structure"]
92impl crate::Readable for DIER {}
93#[doc = "`write(|w| ..)` method takes [dier::W](dier::W) writer structure"]
94impl crate::Writable for DIER {}
95#[doc = "DMA/Interrupt enable register"]
96pub mod dier;
97#[doc = "status register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sr](sr) module"]
98pub type SR = crate::Reg<u32, _SR>;
99#[allow(missing_docs)]
100#[doc(hidden)]
101pub struct _SR;
102#[doc = "`read()` method returns [sr::R](sr::R) reader structure"]
103impl crate::Readable for SR {}
104#[doc = "`write(|w| ..)` method takes [sr::W](sr::W) writer structure"]
105impl crate::Writable for SR {}
106#[doc = "status register"]
107pub mod sr;
108#[doc = "event generation register\n\nThis register you can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [egr](egr) module"]
109pub type EGR = crate::Reg<u32, _EGR>;
110#[allow(missing_docs)]
111#[doc(hidden)]
112pub struct _EGR;
113#[doc = "`write(|w| ..)` method takes [egr::W](egr::W) writer structure"]
114impl crate::Writable for EGR {}
115#[doc = "event generation register"]
116pub mod egr;
117#[doc = "capture/compare mode register (output mode)\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ccmr1_output](ccmr1_output) module"]
118pub type CCMR1_OUTPUT = crate::Reg<u32, _CCMR1_OUTPUT>;
119#[allow(missing_docs)]
120#[doc(hidden)]
121pub struct _CCMR1_OUTPUT;
122#[doc = "`read()` method returns [ccmr1_output::R](ccmr1_output::R) reader structure"]
123impl crate::Readable for CCMR1_OUTPUT {}
124#[doc = "`write(|w| ..)` method takes [ccmr1_output::W](ccmr1_output::W) writer structure"]
125impl crate::Writable for CCMR1_OUTPUT {}
126#[doc = "capture/compare mode register (output mode)"]
127pub mod ccmr1_output;
128#[doc = "capture/compare mode register 1 (input mode)\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ccmr1_input](ccmr1_input) module"]
129pub type CCMR1_INPUT = crate::Reg<u32, _CCMR1_INPUT>;
130#[allow(missing_docs)]
131#[doc(hidden)]
132pub struct _CCMR1_INPUT;
133#[doc = "`read()` method returns [ccmr1_input::R](ccmr1_input::R) reader structure"]
134impl crate::Readable for CCMR1_INPUT {}
135#[doc = "`write(|w| ..)` method takes [ccmr1_input::W](ccmr1_input::W) writer structure"]
136impl crate::Writable for CCMR1_INPUT {}
137#[doc = "capture/compare mode register 1 (input mode)"]
138pub mod ccmr1_input;
139#[doc = "capture/compare enable register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ccer](ccer) module"]
140pub type CCER = crate::Reg<u32, _CCER>;
141#[allow(missing_docs)]
142#[doc(hidden)]
143pub struct _CCER;
144#[doc = "`read()` method returns [ccer::R](ccer::R) reader structure"]
145impl crate::Readable for CCER {}
146#[doc = "`write(|w| ..)` method takes [ccer::W](ccer::W) writer structure"]
147impl crate::Writable for CCER {}
148#[doc = "capture/compare enable register"]
149pub mod ccer;
150#[doc = "counter\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cnt](cnt) module"]
151pub type CNT = crate::Reg<u32, _CNT>;
152#[allow(missing_docs)]
153#[doc(hidden)]
154pub struct _CNT;
155#[doc = "`read()` method returns [cnt::R](cnt::R) reader structure"]
156impl crate::Readable for CNT {}
157#[doc = "`write(|w| ..)` method takes [cnt::W](cnt::W) writer structure"]
158impl crate::Writable for CNT {}
159#[doc = "counter"]
160pub mod cnt;
161#[doc = "prescaler\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [psc](psc) module"]
162pub type PSC = crate::Reg<u32, _PSC>;
163#[allow(missing_docs)]
164#[doc(hidden)]
165pub struct _PSC;
166#[doc = "`read()` method returns [psc::R](psc::R) reader structure"]
167impl crate::Readable for PSC {}
168#[doc = "`write(|w| ..)` method takes [psc::W](psc::W) writer structure"]
169impl crate::Writable for PSC {}
170#[doc = "prescaler"]
171pub mod psc;
172#[doc = "auto-reload register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [arr](arr) module"]
173pub type ARR = crate::Reg<u32, _ARR>;
174#[allow(missing_docs)]
175#[doc(hidden)]
176pub struct _ARR;
177#[doc = "`read()` method returns [arr::R](arr::R) reader structure"]
178impl crate::Readable for ARR {}
179#[doc = "`write(|w| ..)` method takes [arr::W](arr::W) writer structure"]
180impl crate::Writable for ARR {}
181#[doc = "auto-reload register"]
182pub mod arr;
183#[doc = "repetition counter register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rcr](rcr) module"]
184pub type RCR = crate::Reg<u32, _RCR>;
185#[allow(missing_docs)]
186#[doc(hidden)]
187pub struct _RCR;
188#[doc = "`read()` method returns [rcr::R](rcr::R) reader structure"]
189impl crate::Readable for RCR {}
190#[doc = "`write(|w| ..)` method takes [rcr::W](rcr::W) writer structure"]
191impl crate::Writable for RCR {}
192#[doc = "repetition counter register"]
193pub mod rcr;
194#[doc = "capture/compare register 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ccr1](ccr1) module"]
195pub type CCR1 = crate::Reg<u32, _CCR1>;
196#[allow(missing_docs)]
197#[doc(hidden)]
198pub struct _CCR1;
199#[doc = "`read()` method returns [ccr1::R](ccr1::R) reader structure"]
200impl crate::Readable for CCR1 {}
201#[doc = "`write(|w| ..)` method takes [ccr1::W](ccr1::W) writer structure"]
202impl crate::Writable for CCR1 {}
203#[doc = "capture/compare register 1"]
204pub mod ccr1;
205#[doc = "break and dead-time register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [bdtr](bdtr) module"]
206pub type BDTR = crate::Reg<u32, _BDTR>;
207#[allow(missing_docs)]
208#[doc(hidden)]
209pub struct _BDTR;
210#[doc = "`read()` method returns [bdtr::R](bdtr::R) reader structure"]
211impl crate::Readable for BDTR {}
212#[doc = "`write(|w| ..)` method takes [bdtr::W](bdtr::W) writer structure"]
213impl crate::Writable for BDTR {}
214#[doc = "break and dead-time register"]
215pub mod bdtr;
216#[doc = "DMA control register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dcr](dcr) module"]
217pub type DCR = crate::Reg<u32, _DCR>;
218#[allow(missing_docs)]
219#[doc(hidden)]
220pub struct _DCR;
221#[doc = "`read()` method returns [dcr::R](dcr::R) reader structure"]
222impl crate::Readable for DCR {}
223#[doc = "`write(|w| ..)` method takes [dcr::W](dcr::W) writer structure"]
224impl crate::Writable for DCR {}
225#[doc = "DMA control register"]
226pub mod dcr;
227#[doc = "DMA address for full transfer\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dmar](dmar) module"]
228pub type DMAR = crate::Reg<u32, _DMAR>;
229#[allow(missing_docs)]
230#[doc(hidden)]
231pub struct _DMAR;
232#[doc = "`read()` method returns [dmar::R](dmar::R) reader structure"]
233impl crate::Readable for DMAR {}
234#[doc = "`write(|w| ..)` method takes [dmar::W](dmar::W) writer structure"]
235impl crate::Writable for DMAR {}
236#[doc = "DMA address for full transfer"]
237pub mod dmar;
238#[doc = "TIM16 option register 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [or](or) module"]
239pub type OR = crate::Reg<u32, _OR>;
240#[allow(missing_docs)]
241#[doc(hidden)]
242pub struct _OR;
243#[doc = "`read()` method returns [or::R](or::R) reader structure"]
244impl crate::Readable for OR {}
245#[doc = "`write(|w| ..)` method takes [or::W](or::W) writer structure"]
246impl crate::Writable for OR {}
247#[doc = "TIM16 option register 1"]
248pub mod or;
249#[doc = "TIM17 option register 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [af1](af1) module"]
250pub type AF1 = crate::Reg<u32, _AF1>;
251#[allow(missing_docs)]
252#[doc(hidden)]
253pub struct _AF1;
254#[doc = "`read()` method returns [af1::R](af1::R) reader structure"]
255impl crate::Readable for AF1 {}
256#[doc = "`write(|w| ..)` method takes [af1::W](af1::W) writer structure"]
257impl crate::Writable for AF1 {}
258#[doc = "TIM17 option register 1"]
259pub mod af1;