stm32wb_pac/tim1/
ccmr3_output.rs

1#[doc = "Reader of register CCMR3_Output"]
2pub type R = crate::R<u32, super::CCMR3_OUTPUT>;
3#[doc = "Writer for register CCMR3_Output"]
4pub type W = crate::W<u32, super::CCMR3_OUTPUT>;
5#[doc = "Register CCMR3_Output `reset()`'s with value 0"]
6impl crate::ResetValue for super::CCMR3_OUTPUT {
7    type Type = u32;
8    #[inline(always)]
9    fn reset_value() -> Self::Type {
10        0
11    }
12}
13#[doc = "Reader of field `OC6M_bit3`"]
14pub type OC6M_BIT3_R = crate::R<bool, bool>;
15#[doc = "Write proxy for field `OC6M_bit3`"]
16pub struct OC6M_BIT3_W<'a> {
17    w: &'a mut W,
18}
19impl<'a> OC6M_BIT3_W<'a> {
20    #[doc = r"Sets the field bit"]
21    #[inline(always)]
22    pub fn set_bit(self) -> &'a mut W {
23        self.bit(true)
24    }
25    #[doc = r"Clears the field bit"]
26    #[inline(always)]
27    pub fn clear_bit(self) -> &'a mut W {
28        self.bit(false)
29    }
30    #[doc = r"Writes raw bits to the field"]
31    #[inline(always)]
32    pub fn bit(self, value: bool) -> &'a mut W {
33        self.w.bits = (self.w.bits & !(0x01 << 24)) | (((value as u32) & 0x01) << 24);
34        self.w
35    }
36}
37#[doc = "Reader of field `OC5M_bit3`"]
38pub type OC5M_BIT3_R = crate::R<bool, bool>;
39#[doc = "Write proxy for field `OC5M_bit3`"]
40pub struct OC5M_BIT3_W<'a> {
41    w: &'a mut W,
42}
43impl<'a> OC5M_BIT3_W<'a> {
44    #[doc = r"Sets the field bit"]
45    #[inline(always)]
46    pub fn set_bit(self) -> &'a mut W {
47        self.bit(true)
48    }
49    #[doc = r"Clears the field bit"]
50    #[inline(always)]
51    pub fn clear_bit(self) -> &'a mut W {
52        self.bit(false)
53    }
54    #[doc = r"Writes raw bits to the field"]
55    #[inline(always)]
56    pub fn bit(self, value: bool) -> &'a mut W {
57        self.w.bits = (self.w.bits & !(0x01 << 16)) | (((value as u32) & 0x01) << 16);
58        self.w
59    }
60}
61#[doc = "Reader of field `OC6CE`"]
62pub type OC6CE_R = crate::R<bool, bool>;
63#[doc = "Write proxy for field `OC6CE`"]
64pub struct OC6CE_W<'a> {
65    w: &'a mut W,
66}
67impl<'a> OC6CE_W<'a> {
68    #[doc = r"Sets the field bit"]
69    #[inline(always)]
70    pub fn set_bit(self) -> &'a mut W {
71        self.bit(true)
72    }
73    #[doc = r"Clears the field bit"]
74    #[inline(always)]
75    pub fn clear_bit(self) -> &'a mut W {
76        self.bit(false)
77    }
78    #[doc = r"Writes raw bits to the field"]
79    #[inline(always)]
80    pub fn bit(self, value: bool) -> &'a mut W {
81        self.w.bits = (self.w.bits & !(0x01 << 15)) | (((value as u32) & 0x01) << 15);
82        self.w
83    }
84}
85#[doc = "Reader of field `OC6M`"]
86pub type OC6M_R = crate::R<u8, u8>;
87#[doc = "Write proxy for field `OC6M`"]
88pub struct OC6M_W<'a> {
89    w: &'a mut W,
90}
91impl<'a> OC6M_W<'a> {
92    #[doc = r"Writes raw bits to the field"]
93    #[inline(always)]
94    pub unsafe fn bits(self, value: u8) -> &'a mut W {
95        self.w.bits = (self.w.bits & !(0x07 << 12)) | (((value as u32) & 0x07) << 12);
96        self.w
97    }
98}
99#[doc = "Reader of field `OC6PE`"]
100pub type OC6PE_R = crate::R<bool, bool>;
101#[doc = "Write proxy for field `OC6PE`"]
102pub struct OC6PE_W<'a> {
103    w: &'a mut W,
104}
105impl<'a> OC6PE_W<'a> {
106    #[doc = r"Sets the field bit"]
107    #[inline(always)]
108    pub fn set_bit(self) -> &'a mut W {
109        self.bit(true)
110    }
111    #[doc = r"Clears the field bit"]
112    #[inline(always)]
113    pub fn clear_bit(self) -> &'a mut W {
114        self.bit(false)
115    }
116    #[doc = r"Writes raw bits to the field"]
117    #[inline(always)]
118    pub fn bit(self, value: bool) -> &'a mut W {
119        self.w.bits = (self.w.bits & !(0x01 << 11)) | (((value as u32) & 0x01) << 11);
120        self.w
121    }
122}
123#[doc = "Reader of field `OC6FE`"]
124pub type OC6FE_R = crate::R<bool, bool>;
125#[doc = "Write proxy for field `OC6FE`"]
126pub struct OC6FE_W<'a> {
127    w: &'a mut W,
128}
129impl<'a> OC6FE_W<'a> {
130    #[doc = r"Sets the field bit"]
131    #[inline(always)]
132    pub fn set_bit(self) -> &'a mut W {
133        self.bit(true)
134    }
135    #[doc = r"Clears the field bit"]
136    #[inline(always)]
137    pub fn clear_bit(self) -> &'a mut W {
138        self.bit(false)
139    }
140    #[doc = r"Writes raw bits to the field"]
141    #[inline(always)]
142    pub fn bit(self, value: bool) -> &'a mut W {
143        self.w.bits = (self.w.bits & !(0x01 << 10)) | (((value as u32) & 0x01) << 10);
144        self.w
145    }
146}
147#[doc = "Reader of field `OC5CE`"]
148pub type OC5CE_R = crate::R<bool, bool>;
149#[doc = "Write proxy for field `OC5CE`"]
150pub struct OC5CE_W<'a> {
151    w: &'a mut W,
152}
153impl<'a> OC5CE_W<'a> {
154    #[doc = r"Sets the field bit"]
155    #[inline(always)]
156    pub fn set_bit(self) -> &'a mut W {
157        self.bit(true)
158    }
159    #[doc = r"Clears the field bit"]
160    #[inline(always)]
161    pub fn clear_bit(self) -> &'a mut W {
162        self.bit(false)
163    }
164    #[doc = r"Writes raw bits to the field"]
165    #[inline(always)]
166    pub fn bit(self, value: bool) -> &'a mut W {
167        self.w.bits = (self.w.bits & !(0x01 << 7)) | (((value as u32) & 0x01) << 7);
168        self.w
169    }
170}
171#[doc = "Reader of field `OC5M`"]
172pub type OC5M_R = crate::R<u8, u8>;
173#[doc = "Write proxy for field `OC5M`"]
174pub struct OC5M_W<'a> {
175    w: &'a mut W,
176}
177impl<'a> OC5M_W<'a> {
178    #[doc = r"Writes raw bits to the field"]
179    #[inline(always)]
180    pub unsafe fn bits(self, value: u8) -> &'a mut W {
181        self.w.bits = (self.w.bits & !(0x07 << 4)) | (((value as u32) & 0x07) << 4);
182        self.w
183    }
184}
185#[doc = "Reader of field `OC5PE`"]
186pub type OC5PE_R = crate::R<bool, bool>;
187#[doc = "Write proxy for field `OC5PE`"]
188pub struct OC5PE_W<'a> {
189    w: &'a mut W,
190}
191impl<'a> OC5PE_W<'a> {
192    #[doc = r"Sets the field bit"]
193    #[inline(always)]
194    pub fn set_bit(self) -> &'a mut W {
195        self.bit(true)
196    }
197    #[doc = r"Clears the field bit"]
198    #[inline(always)]
199    pub fn clear_bit(self) -> &'a mut W {
200        self.bit(false)
201    }
202    #[doc = r"Writes raw bits to the field"]
203    #[inline(always)]
204    pub fn bit(self, value: bool) -> &'a mut W {
205        self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u32) & 0x01) << 3);
206        self.w
207    }
208}
209#[doc = "Reader of field `OC5FE`"]
210pub type OC5FE_R = crate::R<bool, bool>;
211#[doc = "Write proxy for field `OC5FE`"]
212pub struct OC5FE_W<'a> {
213    w: &'a mut W,
214}
215impl<'a> OC5FE_W<'a> {
216    #[doc = r"Sets the field bit"]
217    #[inline(always)]
218    pub fn set_bit(self) -> &'a mut W {
219        self.bit(true)
220    }
221    #[doc = r"Clears the field bit"]
222    #[inline(always)]
223    pub fn clear_bit(self) -> &'a mut W {
224        self.bit(false)
225    }
226    #[doc = r"Writes raw bits to the field"]
227    #[inline(always)]
228    pub fn bit(self, value: bool) -> &'a mut W {
229        self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u32) & 0x01) << 2);
230        self.w
231    }
232}
233impl R {
234    #[doc = "Bit 24 - Output Compare 6 mode bit 3"]
235    #[inline(always)]
236    pub fn oc6m_bit3(&self) -> OC6M_BIT3_R {
237        OC6M_BIT3_R::new(((self.bits >> 24) & 0x01) != 0)
238    }
239    #[doc = "Bit 16 - Output Compare 5 mode bit 3"]
240    #[inline(always)]
241    pub fn oc5m_bit3(&self) -> OC5M_BIT3_R {
242        OC5M_BIT3_R::new(((self.bits >> 16) & 0x01) != 0)
243    }
244    #[doc = "Bit 15 - Output compare 6 clear enable"]
245    #[inline(always)]
246    pub fn oc6ce(&self) -> OC6CE_R {
247        OC6CE_R::new(((self.bits >> 15) & 0x01) != 0)
248    }
249    #[doc = "Bits 12:14 - Output compare 6 mode"]
250    #[inline(always)]
251    pub fn oc6m(&self) -> OC6M_R {
252        OC6M_R::new(((self.bits >> 12) & 0x07) as u8)
253    }
254    #[doc = "Bit 11 - Output compare 6 preload enable"]
255    #[inline(always)]
256    pub fn oc6pe(&self) -> OC6PE_R {
257        OC6PE_R::new(((self.bits >> 11) & 0x01) != 0)
258    }
259    #[doc = "Bit 10 - Output compare 6 fast enable"]
260    #[inline(always)]
261    pub fn oc6fe(&self) -> OC6FE_R {
262        OC6FE_R::new(((self.bits >> 10) & 0x01) != 0)
263    }
264    #[doc = "Bit 7 - Output compare 5 clear enable"]
265    #[inline(always)]
266    pub fn oc5ce(&self) -> OC5CE_R {
267        OC5CE_R::new(((self.bits >> 7) & 0x01) != 0)
268    }
269    #[doc = "Bits 4:6 - Output compare 5 mode"]
270    #[inline(always)]
271    pub fn oc5m(&self) -> OC5M_R {
272        OC5M_R::new(((self.bits >> 4) & 0x07) as u8)
273    }
274    #[doc = "Bit 3 - Output compare 5 preload enable"]
275    #[inline(always)]
276    pub fn oc5pe(&self) -> OC5PE_R {
277        OC5PE_R::new(((self.bits >> 3) & 0x01) != 0)
278    }
279    #[doc = "Bit 2 - Output compare 5 fast enable"]
280    #[inline(always)]
281    pub fn oc5fe(&self) -> OC5FE_R {
282        OC5FE_R::new(((self.bits >> 2) & 0x01) != 0)
283    }
284}
285impl W {
286    #[doc = "Bit 24 - Output Compare 6 mode bit 3"]
287    #[inline(always)]
288    pub fn oc6m_bit3(&mut self) -> OC6M_BIT3_W {
289        OC6M_BIT3_W { w: self }
290    }
291    #[doc = "Bit 16 - Output Compare 5 mode bit 3"]
292    #[inline(always)]
293    pub fn oc5m_bit3(&mut self) -> OC5M_BIT3_W {
294        OC5M_BIT3_W { w: self }
295    }
296    #[doc = "Bit 15 - Output compare 6 clear enable"]
297    #[inline(always)]
298    pub fn oc6ce(&mut self) -> OC6CE_W {
299        OC6CE_W { w: self }
300    }
301    #[doc = "Bits 12:14 - Output compare 6 mode"]
302    #[inline(always)]
303    pub fn oc6m(&mut self) -> OC6M_W {
304        OC6M_W { w: self }
305    }
306    #[doc = "Bit 11 - Output compare 6 preload enable"]
307    #[inline(always)]
308    pub fn oc6pe(&mut self) -> OC6PE_W {
309        OC6PE_W { w: self }
310    }
311    #[doc = "Bit 10 - Output compare 6 fast enable"]
312    #[inline(always)]
313    pub fn oc6fe(&mut self) -> OC6FE_W {
314        OC6FE_W { w: self }
315    }
316    #[doc = "Bit 7 - Output compare 5 clear enable"]
317    #[inline(always)]
318    pub fn oc5ce(&mut self) -> OC5CE_W {
319        OC5CE_W { w: self }
320    }
321    #[doc = "Bits 4:6 - Output compare 5 mode"]
322    #[inline(always)]
323    pub fn oc5m(&mut self) -> OC5M_W {
324        OC5M_W { w: self }
325    }
326    #[doc = "Bit 3 - Output compare 5 preload enable"]
327    #[inline(always)]
328    pub fn oc5pe(&mut self) -> OC5PE_W {
329        OC5PE_W { w: self }
330    }
331    #[doc = "Bit 2 - Output compare 5 fast enable"]
332    #[inline(always)]
333    pub fn oc5fe(&mut self) -> OC5FE_W {
334        OC5FE_W { w: self }
335    }
336}
stm32wb_pac/tim1/ccmr3_output.rs

stm32wb_pac/tim1/
ccmr3_output.rs
