stm32wb_pac/rcc/
ahb1enr.rs

1#[doc = "Reader of register AHB1ENR"]
2pub type R = crate::R<u32, super::AHB1ENR>;
3#[doc = "Writer for register AHB1ENR"]
4pub type W = crate::W<u32, super::AHB1ENR>;
5#[doc = "Register AHB1ENR `reset()`'s with value 0x0100"]
6impl crate::ResetValue for super::AHB1ENR {
7    type Type = u32;
8    #[inline(always)]
9    fn reset_value() -> Self::Type {
10        0x0100
11    }
12}
13#[doc = "Reader of field `TSCEN`"]
14pub type TSCEN_R = crate::R<bool, bool>;
15#[doc = "Write proxy for field `TSCEN`"]
16pub struct TSCEN_W<'a> {
17    w: &'a mut W,
18}
19impl<'a> TSCEN_W<'a> {
20    #[doc = r"Sets the field bit"]
21    #[inline(always)]
22    pub fn set_bit(self) -> &'a mut W {
23        self.bit(true)
24    }
25    #[doc = r"Clears the field bit"]
26    #[inline(always)]
27    pub fn clear_bit(self) -> &'a mut W {
28        self.bit(false)
29    }
30    #[doc = r"Writes raw bits to the field"]
31    #[inline(always)]
32    pub fn bit(self, value: bool) -> &'a mut W {
33        self.w.bits = (self.w.bits & !(0x01 << 16)) | (((value as u32) & 0x01) << 16);
34        self.w
35    }
36}
37#[doc = "Reader of field `CRCEN`"]
38pub type CRCEN_R = crate::R<bool, bool>;
39#[doc = "Write proxy for field `CRCEN`"]
40pub struct CRCEN_W<'a> {
41    w: &'a mut W,
42}
43impl<'a> CRCEN_W<'a> {
44    #[doc = r"Sets the field bit"]
45    #[inline(always)]
46    pub fn set_bit(self) -> &'a mut W {
47        self.bit(true)
48    }
49    #[doc = r"Clears the field bit"]
50    #[inline(always)]
51    pub fn clear_bit(self) -> &'a mut W {
52        self.bit(false)
53    }
54    #[doc = r"Writes raw bits to the field"]
55    #[inline(always)]
56    pub fn bit(self, value: bool) -> &'a mut W {
57        self.w.bits = (self.w.bits & !(0x01 << 12)) | (((value as u32) & 0x01) << 12);
58        self.w
59    }
60}
61#[doc = "Reader of field `DMAMUXEN`"]
62pub type DMAMUXEN_R = crate::R<bool, bool>;
63#[doc = "Write proxy for field `DMAMUXEN`"]
64pub struct DMAMUXEN_W<'a> {
65    w: &'a mut W,
66}
67impl<'a> DMAMUXEN_W<'a> {
68    #[doc = r"Sets the field bit"]
69    #[inline(always)]
70    pub fn set_bit(self) -> &'a mut W {
71        self.bit(true)
72    }
73    #[doc = r"Clears the field bit"]
74    #[inline(always)]
75    pub fn clear_bit(self) -> &'a mut W {
76        self.bit(false)
77    }
78    #[doc = r"Writes raw bits to the field"]
79    #[inline(always)]
80    pub fn bit(self, value: bool) -> &'a mut W {
81        self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u32) & 0x01) << 2);
82        self.w
83    }
84}
85#[doc = "Reader of field `DMA2EN`"]
86pub type DMA2EN_R = crate::R<bool, bool>;
87#[doc = "Write proxy for field `DMA2EN`"]
88pub struct DMA2EN_W<'a> {
89    w: &'a mut W,
90}
91impl<'a> DMA2EN_W<'a> {
92    #[doc = r"Sets the field bit"]
93    #[inline(always)]
94    pub fn set_bit(self) -> &'a mut W {
95        self.bit(true)
96    }
97    #[doc = r"Clears the field bit"]
98    #[inline(always)]
99    pub fn clear_bit(self) -> &'a mut W {
100        self.bit(false)
101    }
102    #[doc = r"Writes raw bits to the field"]
103    #[inline(always)]
104    pub fn bit(self, value: bool) -> &'a mut W {
105        self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1);
106        self.w
107    }
108}
109#[doc = "Reader of field `DMA1EN`"]
110pub type DMA1EN_R = crate::R<bool, bool>;
111#[doc = "Write proxy for field `DMA1EN`"]
112pub struct DMA1EN_W<'a> {
113    w: &'a mut W,
114}
115impl<'a> DMA1EN_W<'a> {
116    #[doc = r"Sets the field bit"]
117    #[inline(always)]
118    pub fn set_bit(self) -> &'a mut W {
119        self.bit(true)
120    }
121    #[doc = r"Clears the field bit"]
122    #[inline(always)]
123    pub fn clear_bit(self) -> &'a mut W {
124        self.bit(false)
125    }
126    #[doc = r"Writes raw bits to the field"]
127    #[inline(always)]
128    pub fn bit(self, value: bool) -> &'a mut W {
129        self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01);
130        self.w
131    }
132}
133impl R {
134    #[doc = "Bit 16 - Touch Sensing Controller clock enable"]
135    #[inline(always)]
136    pub fn tscen(&self) -> TSCEN_R {
137        TSCEN_R::new(((self.bits >> 16) & 0x01) != 0)
138    }
139    #[doc = "Bit 12 - CPU1 CRC clock enable"]
140    #[inline(always)]
141    pub fn crcen(&self) -> CRCEN_R {
142        CRCEN_R::new(((self.bits >> 12) & 0x01) != 0)
143    }
144    #[doc = "Bit 2 - DMAMUX clock enable"]
145    #[inline(always)]
146    pub fn dmamuxen(&self) -> DMAMUXEN_R {
147        DMAMUXEN_R::new(((self.bits >> 2) & 0x01) != 0)
148    }
149    #[doc = "Bit 1 - DMA2 clock enable"]
150    #[inline(always)]
151    pub fn dma2en(&self) -> DMA2EN_R {
152        DMA2EN_R::new(((self.bits >> 1) & 0x01) != 0)
153    }
154    #[doc = "Bit 0 - DMA1 clock enable"]
155    #[inline(always)]
156    pub fn dma1en(&self) -> DMA1EN_R {
157        DMA1EN_R::new((self.bits & 0x01) != 0)
158    }
159}
160impl W {
161    #[doc = "Bit 16 - Touch Sensing Controller clock enable"]
162    #[inline(always)]
163    pub fn tscen(&mut self) -> TSCEN_W {
164        TSCEN_W { w: self }
165    }
166    #[doc = "Bit 12 - CPU1 CRC clock enable"]
167    #[inline(always)]
168    pub fn crcen(&mut self) -> CRCEN_W {
169        CRCEN_W { w: self }
170    }
171    #[doc = "Bit 2 - DMAMUX clock enable"]
172    #[inline(always)]
173    pub fn dmamuxen(&mut self) -> DMAMUXEN_W {
174        DMAMUXEN_W { w: self }
175    }
176    #[doc = "Bit 1 - DMA2 clock enable"]
177    #[inline(always)]
178    pub fn dma2en(&mut self) -> DMA2EN_W {
179        DMA2EN_W { w: self }
180    }
181    #[doc = "Bit 0 - DMA1 clock enable"]
182    #[inline(always)]
183    pub fn dma1en(&mut self) -> DMA1EN_W {
184        DMA1EN_W { w: self }
185    }
186}
stm32wb_pac/rcc/ahb1enr.rs

stm32wb_pac/rcc/
ahb1enr.rs
