Type Definition stm32wb_pac::syscfg::c2imr2::W

type W = W<u32, C2IMR2>;

Writer for register C2IMR2

Implementations

impl W

pub fn dma1_ch1_im(&mut self) -> DMA1_CH1_IM_W<'_>

Bit 0 - Peripheral DMA1 CH1 interrupt mask to CPU2

pub fn dma1_ch2_im(&mut self) -> DMA1_CH2_IM_W<'_>

Bit 1 - Peripheral DMA1 CH2 interrupt mask to CPU2

pub fn dma1_ch3_im(&mut self) -> DMA1_CH3_IM_W<'_>

Bit 2 - Peripheral DMA1 CH3 interrupt mask to CPU2

pub fn dma1_ch4_im(&mut self) -> DMA1_CH4_IM_W<'_>

Bit 3 - Peripheral DMA1 CH4 interrupt mask to CPU2

pub fn dma1_ch5_im(&mut self) -> DMA1_CH5_IM_W<'_>

Bit 4 - Peripheral DMA1 CH5 interrupt mask to CPU2

pub fn dma1_ch6_im(&mut self) -> DMA1_CH6_IM_W<'_>

Bit 5 - Peripheral DMA1 CH6 interrupt mask to CPU2

pub fn dma1_ch7_im(&mut self) -> DMA1_CH7_IM_W<'_>

Bit 6 - Peripheral DMA1 CH7 interrupt mask to CPU2

pub fn dma2_ch1_im(&mut self) -> DMA2_CH1_IM_W<'_>

Bit 8 - Peripheral DMA2 CH1 interrupt mask to CPU1

pub fn dma2_ch2_im(&mut self) -> DMA2_CH2_IM_W<'_>

Bit 9 - Peripheral DMA2 CH2 interrupt mask to CPU1

pub fn dma2_ch3_im(&mut self) -> DMA2_CH3_IM_W<'_>

Bit 10 - Peripheral DMA2 CH3 interrupt mask to CPU1

pub fn dma2_ch4_im(&mut self) -> DMA2_CH4_IM_W<'_>

Bit 11 - Peripheral DMA2 CH4 interrupt mask to CPU1

pub fn dma2_ch5_im(&mut self) -> DMA2_CH5_IM_W<'_>

Bit 12 - Peripheral DMA2 CH5 interrupt mask to CPU1

pub fn dma2_ch6_im(&mut self) -> DMA2_CH6_IM_W<'_>

Bit 13 - Peripheral DMA2 CH6 interrupt mask to CPU1

pub fn dma2_ch7_im(&mut self) -> DMA2_CH7_IM_W<'_>

Bit 14 - Peripheral DMA2 CH7 interrupt mask to CPU1

pub fn dmam_ux1_im(&mut self) -> DMAM_UX1_IM_W<'_>

Bit 15 - Peripheral DMAM UX1 interrupt mask to CPU1

pub fn pvm1im(&mut self) -> PVM1IM_W<'_>

Bit 16 - Peripheral PVM1IM interrupt mask to CPU1

pub fn pvm3im(&mut self) -> PVM3IM_W<'_>

Bit 18 - Peripheral PVM3IM interrupt mask to CPU1

pub fn pvdim(&mut self) -> PVDIM_W<'_>

Bit 20 - Peripheral PVDIM interrupt mask to CPU1

pub fn tscim(&mut self) -> TSCIM_W<'_>

Bit 21 - Peripheral TSCIM interrupt mask to CPU1

pub fn lcdim(&mut self) -> LCDIM_W<'_>

Bit 22 - Peripheral LCDIM interrupt mask to CPU1