[][src]Type Definition stm32wb_pac::rcc::pllsai1cfgr::W

type W = W<u32, PLLSAI1CFGR>;

Writer for register PLLSAI1CFGR

Implementations

impl W[src]

pub fn pllr(&mut self) -> PLLR_W<'_>[src]

Bits 29:31 - PLLSAI division factor R for PLLADC1CLK (ADC clock)

pub fn pllren(&mut self) -> PLLREN_W<'_>[src]

Bit 28 - PLLSAI PLLADC1CLK output enable

pub fn pllq(&mut self) -> PLLQ_W<'_>[src]

Bits 25:27 - SAIPLL division factor Q for PLLSAIUSBCLK (48 MHz clock)

pub fn pllqen(&mut self) -> PLLQEN_W<'_>[src]

Bit 24 - SAIPLL PLLSAIUSBCLK output enable

pub fn pllp(&mut self) -> PLLP_W<'_>[src]

Bits 17:21 - SAI1PLL division factor P for PLLSAICLK (SAI1clock)

pub fn pllpen(&mut self) -> PLLPEN_W<'_>[src]

Bit 16 - SAIPLL PLLSAI1CLK output enable

pub fn plln(&mut self) -> PLLN_W<'_>[src]

Bits 8:14 - SAIPLL multiplication factor for VCO