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#[doc = "Reader of register CR1"] pub type R = crate::R<u32, super::CR1>; #[doc = "Writer for register CR1"] pub type W = crate::W<u32, super::CR1>; #[doc = "Register CR1 `reset()`'s with value 0"] impl crate::ResetValue for super::CR1 { type Type = u32; #[inline(always)] fn reset_value() -> Self::Type { 0 } } #[doc = "Reader of field `UIFREMAP`"] pub type UIFREMAP_R = crate::R<bool, bool>; #[doc = "Write proxy for field `UIFREMAP`"] pub struct UIFREMAP_W<'a> { w: &'a mut W, } impl<'a> UIFREMAP_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | (((value as u32) & 0x01) << 11); self.w } } #[doc = "Reader of field `CKD`"] pub type CKD_R = crate::R<u8, u8>; #[doc = "Write proxy for field `CKD`"] pub struct CKD_W<'a> { w: &'a mut W, } impl<'a> CKD_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 8)) | (((value as u32) & 0x03) << 8); self.w } } #[doc = "Reader of field `ARPE`"] pub type ARPE_R = crate::R<bool, bool>; #[doc = "Write proxy for field `ARPE`"] pub struct ARPE_W<'a> { w: &'a mut W, } impl<'a> ARPE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | (((value as u32) & 0x01) << 7); self.w } } #[doc = "Reader of field `CMS`"] pub type CMS_R = crate::R<u8, u8>; #[doc = "Write proxy for field `CMS`"] pub struct CMS_W<'a> { w: &'a mut W, } impl<'a> CMS_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 5)) | (((value as u32) & 0x03) << 5); self.w } } #[doc = "Reader of field `DIR`"] pub type DIR_R = crate::R<bool, bool>; #[doc = "Write proxy for field `DIR`"] pub struct DIR_W<'a> { w: &'a mut W, } impl<'a> DIR_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | (((value as u32) & 0x01) << 4); self.w } } #[doc = "Reader of field `OPM`"] pub type OPM_R = crate::R<bool, bool>; #[doc = "Write proxy for field `OPM`"] pub struct OPM_W<'a> { w: &'a mut W, } impl<'a> OPM_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u32) & 0x01) << 3); self.w } } #[doc = "Reader of field `URS`"] pub type URS_R = crate::R<bool, bool>; #[doc = "Write proxy for field `URS`"] pub struct URS_W<'a> { w: &'a mut W, } impl<'a> URS_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u32) & 0x01) << 2); self.w } } #[doc = "Reader of field `UDIS`"] pub type UDIS_R = crate::R<bool, bool>; #[doc = "Write proxy for field `UDIS`"] pub struct UDIS_W<'a> { w: &'a mut W, } impl<'a> UDIS_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1); self.w } } #[doc = "Reader of field `CEN`"] pub type CEN_R = crate::R<bool, bool>; #[doc = "Write proxy for field `CEN`"] pub struct CEN_W<'a> { w: &'a mut W, } impl<'a> CEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01); self.w } } impl R { #[doc = "Bit 11 - UIF status bit remapping"] #[inline(always)] pub fn uifremap(&self) -> UIFREMAP_R { UIFREMAP_R::new(((self.bits >> 11) & 0x01) != 0) } #[doc = "Bits 8:9 - Clock division"] #[inline(always)] pub fn ckd(&self) -> CKD_R { CKD_R::new(((self.bits >> 8) & 0x03) as u8) } #[doc = "Bit 7 - Auto-reload preload enable"] #[inline(always)] pub fn arpe(&self) -> ARPE_R { ARPE_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bits 5:6 - Center-aligned mode selection"] #[inline(always)] pub fn cms(&self) -> CMS_R { CMS_R::new(((self.bits >> 5) & 0x03) as u8) } #[doc = "Bit 4 - Direction"] #[inline(always)] pub fn dir(&self) -> DIR_R { DIR_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 3 - One-pulse mode"] #[inline(always)] pub fn opm(&self) -> OPM_R { OPM_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 2 - Update request source"] #[inline(always)] pub fn urs(&self) -> URS_R { URS_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 1 - Update disable"] #[inline(always)] pub fn udis(&self) -> UDIS_R { UDIS_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 0 - Counter enable"] #[inline(always)] pub fn cen(&self) -> CEN_R { CEN_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bit 11 - UIF status bit remapping"] #[inline(always)] pub fn uifremap(&mut self) -> UIFREMAP_W { UIFREMAP_W { w: self } } #[doc = "Bits 8:9 - Clock division"] #[inline(always)] pub fn ckd(&mut self) -> CKD_W { CKD_W { w: self } } #[doc = "Bit 7 - Auto-reload preload enable"] #[inline(always)] pub fn arpe(&mut self) -> ARPE_W { ARPE_W { w: self } } #[doc = "Bits 5:6 - Center-aligned mode selection"] #[inline(always)] pub fn cms(&mut self) -> CMS_W { CMS_W { w: self } } #[doc = "Bit 4 - Direction"] #[inline(always)] pub fn dir(&mut self) -> DIR_W { DIR_W { w: self } } #[doc = "Bit 3 - One-pulse mode"] #[inline(always)] pub fn opm(&mut self) -> OPM_W { OPM_W { w: self } } #[doc = "Bit 2 - Update request source"] #[inline(always)] pub fn urs(&mut self) -> URS_W { URS_W { w: self } } #[doc = "Bit 1 - Update disable"] #[inline(always)] pub fn udis(&mut self) -> UDIS_W { UDIS_W { w: self } } #[doc = "Bit 0 - Counter enable"] #[inline(always)] pub fn cen(&mut self) -> CEN_W { CEN_W { w: self } } }