stm32wb_pac/tim2/
ccmr1_input.rs

1#[doc = "Reader of register CCMR1_Input"]
2pub type R = crate::R<u32, super::CCMR1_INPUT>;
3#[doc = "Writer for register CCMR1_Input"]
4pub type W = crate::W<u32, super::CCMR1_INPUT>;
5#[doc = "Register CCMR1_Input `reset()`'s with value 0"]
6impl crate::ResetValue for super::CCMR1_INPUT {
7    type Type = u32;
8    #[inline(always)]
9    fn reset_value() -> Self::Type {
10        0
11    }
12}
13#[doc = "Reader of field `IC2F`"]
14pub type IC2F_R = crate::R<u8, u8>;
15#[doc = "Write proxy for field `IC2F`"]
16pub struct IC2F_W<'a> {
17    w: &'a mut W,
18}
19impl<'a> IC2F_W<'a> {
20    #[doc = r"Writes raw bits to the field"]
21    #[inline(always)]
22    pub unsafe fn bits(self, value: u8) -> &'a mut W {
23        self.w.bits = (self.w.bits & !(0x0f << 12)) | (((value as u32) & 0x0f) << 12);
24        self.w
25    }
26}
27#[doc = "Reader of field `IC2PSC`"]
28pub type IC2PSC_R = crate::R<u8, u8>;
29#[doc = "Write proxy for field `IC2PSC`"]
30pub struct IC2PSC_W<'a> {
31    w: &'a mut W,
32}
33impl<'a> IC2PSC_W<'a> {
34    #[doc = r"Writes raw bits to the field"]
35    #[inline(always)]
36    pub unsafe fn bits(self, value: u8) -> &'a mut W {
37        self.w.bits = (self.w.bits & !(0x03 << 10)) | (((value as u32) & 0x03) << 10);
38        self.w
39    }
40}
41#[doc = "Reader of field `CC2S`"]
42pub type CC2S_R = crate::R<u8, u8>;
43#[doc = "Write proxy for field `CC2S`"]
44pub struct CC2S_W<'a> {
45    w: &'a mut W,
46}
47impl<'a> CC2S_W<'a> {
48    #[doc = r"Writes raw bits to the field"]
49    #[inline(always)]
50    pub unsafe fn bits(self, value: u8) -> &'a mut W {
51        self.w.bits = (self.w.bits & !(0x03 << 8)) | (((value as u32) & 0x03) << 8);
52        self.w
53    }
54}
55#[doc = "Reader of field `IC1F`"]
56pub type IC1F_R = crate::R<u8, u8>;
57#[doc = "Write proxy for field `IC1F`"]
58pub struct IC1F_W<'a> {
59    w: &'a mut W,
60}
61impl<'a> IC1F_W<'a> {
62    #[doc = r"Writes raw bits to the field"]
63    #[inline(always)]
64    pub unsafe fn bits(self, value: u8) -> &'a mut W {
65        self.w.bits = (self.w.bits & !(0x0f << 4)) | (((value as u32) & 0x0f) << 4);
66        self.w
67    }
68}
69#[doc = "Reader of field `IC1PSC`"]
70pub type IC1PSC_R = crate::R<u8, u8>;
71#[doc = "Write proxy for field `IC1PSC`"]
72pub struct IC1PSC_W<'a> {
73    w: &'a mut W,
74}
75impl<'a> IC1PSC_W<'a> {
76    #[doc = r"Writes raw bits to the field"]
77    #[inline(always)]
78    pub unsafe fn bits(self, value: u8) -> &'a mut W {
79        self.w.bits = (self.w.bits & !(0x03 << 2)) | (((value as u32) & 0x03) << 2);
80        self.w
81    }
82}
83#[doc = "Reader of field `CC1S`"]
84pub type CC1S_R = crate::R<u8, u8>;
85#[doc = "Write proxy for field `CC1S`"]
86pub struct CC1S_W<'a> {
87    w: &'a mut W,
88}
89impl<'a> CC1S_W<'a> {
90    #[doc = r"Writes raw bits to the field"]
91    #[inline(always)]
92    pub unsafe fn bits(self, value: u8) -> &'a mut W {
93        self.w.bits = (self.w.bits & !0x03) | ((value as u32) & 0x03);
94        self.w
95    }
96}
97impl R {
98    #[doc = "Bits 12:15 - Input capture 2 filter"]
99    #[inline(always)]
100    pub fn ic2f(&self) -> IC2F_R {
101        IC2F_R::new(((self.bits >> 12) & 0x0f) as u8)
102    }
103    #[doc = "Bits 10:11 - Input capture 2 prescaler"]
104    #[inline(always)]
105    pub fn ic2psc(&self) -> IC2PSC_R {
106        IC2PSC_R::new(((self.bits >> 10) & 0x03) as u8)
107    }
108    #[doc = "Bits 8:9 - Capture/compare 2 selection"]
109    #[inline(always)]
110    pub fn cc2s(&self) -> CC2S_R {
111        CC2S_R::new(((self.bits >> 8) & 0x03) as u8)
112    }
113    #[doc = "Bits 4:7 - Input capture 1 filter"]
114    #[inline(always)]
115    pub fn ic1f(&self) -> IC1F_R {
116        IC1F_R::new(((self.bits >> 4) & 0x0f) as u8)
117    }
118    #[doc = "Bits 2:3 - Input capture 1 prescaler"]
119    #[inline(always)]
120    pub fn ic1psc(&self) -> IC1PSC_R {
121        IC1PSC_R::new(((self.bits >> 2) & 0x03) as u8)
122    }
123    #[doc = "Bits 0:1 - Capture/Compare 1 selection"]
124    #[inline(always)]
125    pub fn cc1s(&self) -> CC1S_R {
126        CC1S_R::new((self.bits & 0x03) as u8)
127    }
128}
129impl W {
130    #[doc = "Bits 12:15 - Input capture 2 filter"]
131    #[inline(always)]
132    pub fn ic2f(&mut self) -> IC2F_W {
133        IC2F_W { w: self }
134    }
135    #[doc = "Bits 10:11 - Input capture 2 prescaler"]
136    #[inline(always)]
137    pub fn ic2psc(&mut self) -> IC2PSC_W {
138        IC2PSC_W { w: self }
139    }
140    #[doc = "Bits 8:9 - Capture/compare 2 selection"]
141    #[inline(always)]
142    pub fn cc2s(&mut self) -> CC2S_W {
143        CC2S_W { w: self }
144    }
145    #[doc = "Bits 4:7 - Input capture 1 filter"]
146    #[inline(always)]
147    pub fn ic1f(&mut self) -> IC1F_W {
148        IC1F_W { w: self }
149    }
150    #[doc = "Bits 2:3 - Input capture 1 prescaler"]
151    #[inline(always)]
152    pub fn ic1psc(&mut self) -> IC1PSC_W {
153        IC1PSC_W { w: self }
154    }
155    #[doc = "Bits 0:1 - Capture/Compare 1 selection"]
156    #[inline(always)]
157    pub fn cc1s(&mut self) -> CC1S_W {
158        CC1S_W { w: self }
159    }
160}
stm32wb_pac/tim2/ccmr1_input.rs

stm32wb_pac/tim2/
ccmr1_input.rs
