stm32wb_pac/tim17/
or.rs

1#[doc = "Reader of register OR"]
2pub type R = crate::R<u32, super::OR>;
3#[doc = "Writer for register OR"]
4pub type W = crate::W<u32, super::OR>;
5#[doc = "Register OR `reset()`'s with value 0"]
6impl crate::ResetValue for super::OR {
7    type Type = u32;
8    #[inline(always)]
9    fn reset_value() -> Self::Type {
10        0
11    }
12}
13#[doc = "Reader of field `TI1_RMP`"]
14pub type TI1_RMP_R = crate::R<u8, u8>;
15#[doc = "Write proxy for field `TI1_RMP`"]
16pub struct TI1_RMP_W<'a> {
17    w: &'a mut W,
18}
19impl<'a> TI1_RMP_W<'a> {
20    #[doc = r"Writes raw bits to the field"]
21    #[inline(always)]
22    pub unsafe fn bits(self, value: u8) -> &'a mut W {
23        self.w.bits = (self.w.bits & !0x03) | ((value as u32) & 0x03);
24        self.w
25    }
26}
27impl R {
28    #[doc = "Bits 0:1 - Input capture 1 remap"]
29    #[inline(always)]
30    pub fn ti1_rmp(&self) -> TI1_RMP_R {
31        TI1_RMP_R::new((self.bits & 0x03) as u8)
32    }
33}
34impl W {
35    #[doc = "Bits 0:1 - Input capture 1 remap"]
36    #[inline(always)]
37    pub fn ti1_rmp(&mut self) -> TI1_RMP_W {
38        TI1_RMP_W { w: self }
39    }
40}
stm32wb_pac/tim17/or.rs

stm32wb_pac/tim17/
or.rs
