stm32wb_pac/gpioe/
ospeedr.rs

1#[doc = "Reader of register OSPEEDR"]
2pub type R = crate::R<u32, super::OSPEEDR>;
3#[doc = "Writer for register OSPEEDR"]
4pub type W = crate::W<u32, super::OSPEEDR>;
5#[doc = "Register OSPEEDR `reset()`'s with value 0xc0"]
6impl crate::ResetValue for super::OSPEEDR {
7    type Type = u32;
8    #[inline(always)]
9    fn reset_value() -> Self::Type {
10        0xc0
11    }
12}
13#[doc = "Reader of field `OSPEEDR4`"]
14pub type OSPEEDR4_R = crate::R<u8, u8>;
15#[doc = "Write proxy for field `OSPEEDR4`"]
16pub struct OSPEEDR4_W<'a> {
17    w: &'a mut W,
18}
19impl<'a> OSPEEDR4_W<'a> {
20    #[doc = r"Writes raw bits to the field"]
21    #[inline(always)]
22    pub unsafe fn bits(self, value: u8) -> &'a mut W {
23        self.w.bits = (self.w.bits & !(0x03 << 8)) | (((value as u32) & 0x03) << 8);
24        self.w
25    }
26}
27#[doc = "Reader of field `OSPEEDR3`"]
28pub type OSPEEDR3_R = crate::R<u8, u8>;
29#[doc = "Write proxy for field `OSPEEDR3`"]
30pub struct OSPEEDR3_W<'a> {
31    w: &'a mut W,
32}
33impl<'a> OSPEEDR3_W<'a> {
34    #[doc = r"Writes raw bits to the field"]
35    #[inline(always)]
36    pub unsafe fn bits(self, value: u8) -> &'a mut W {
37        self.w.bits = (self.w.bits & !(0x03 << 6)) | (((value as u32) & 0x03) << 6);
38        self.w
39    }
40}
41#[doc = "Reader of field `OSPEEDR2`"]
42pub type OSPEEDR2_R = crate::R<u8, u8>;
43#[doc = "Write proxy for field `OSPEEDR2`"]
44pub struct OSPEEDR2_W<'a> {
45    w: &'a mut W,
46}
47impl<'a> OSPEEDR2_W<'a> {
48    #[doc = r"Writes raw bits to the field"]
49    #[inline(always)]
50    pub unsafe fn bits(self, value: u8) -> &'a mut W {
51        self.w.bits = (self.w.bits & !(0x03 << 4)) | (((value as u32) & 0x03) << 4);
52        self.w
53    }
54}
55#[doc = "Reader of field `OSPEEDR1`"]
56pub type OSPEEDR1_R = crate::R<u8, u8>;
57#[doc = "Write proxy for field `OSPEEDR1`"]
58pub struct OSPEEDR1_W<'a> {
59    w: &'a mut W,
60}
61impl<'a> OSPEEDR1_W<'a> {
62    #[doc = r"Writes raw bits to the field"]
63    #[inline(always)]
64    pub unsafe fn bits(self, value: u8) -> &'a mut W {
65        self.w.bits = (self.w.bits & !(0x03 << 2)) | (((value as u32) & 0x03) << 2);
66        self.w
67    }
68}
69#[doc = "Reader of field `OSPEEDR0`"]
70pub type OSPEEDR0_R = crate::R<u8, u8>;
71#[doc = "Write proxy for field `OSPEEDR0`"]
72pub struct OSPEEDR0_W<'a> {
73    w: &'a mut W,
74}
75impl<'a> OSPEEDR0_W<'a> {
76    #[doc = r"Writes raw bits to the field"]
77    #[inline(always)]
78    pub unsafe fn bits(self, value: u8) -> &'a mut W {
79        self.w.bits = (self.w.bits & !0x03) | ((value as u32) & 0x03);
80        self.w
81    }
82}
83impl R {
84    #[doc = "Bits 8:9 - Port x configuration bits (y = 0..15)"]
85    #[inline(always)]
86    pub fn ospeedr4(&self) -> OSPEEDR4_R {
87        OSPEEDR4_R::new(((self.bits >> 8) & 0x03) as u8)
88    }
89    #[doc = "Bits 6:7 - Port x configuration bits (y = 0..15)"]
90    #[inline(always)]
91    pub fn ospeedr3(&self) -> OSPEEDR3_R {
92        OSPEEDR3_R::new(((self.bits >> 6) & 0x03) as u8)
93    }
94    #[doc = "Bits 4:5 - Port x configuration bits (y = 0..15)"]
95    #[inline(always)]
96    pub fn ospeedr2(&self) -> OSPEEDR2_R {
97        OSPEEDR2_R::new(((self.bits >> 4) & 0x03) as u8)
98    }
99    #[doc = "Bits 2:3 - Port x configuration bits (y = 0..15)"]
100    #[inline(always)]
101    pub fn ospeedr1(&self) -> OSPEEDR1_R {
102        OSPEEDR1_R::new(((self.bits >> 2) & 0x03) as u8)
103    }
104    #[doc = "Bits 0:1 - Port x configuration bits (y = 0..15)"]
105    #[inline(always)]
106    pub fn ospeedr0(&self) -> OSPEEDR0_R {
107        OSPEEDR0_R::new((self.bits & 0x03) as u8)
108    }
109}
110impl W {
111    #[doc = "Bits 8:9 - Port x configuration bits (y = 0..15)"]
112    #[inline(always)]
113    pub fn ospeedr4(&mut self) -> OSPEEDR4_W {
114        OSPEEDR4_W { w: self }
115    }
116    #[doc = "Bits 6:7 - Port x configuration bits (y = 0..15)"]
117    #[inline(always)]
118    pub fn ospeedr3(&mut self) -> OSPEEDR3_W {
119        OSPEEDR3_W { w: self }
120    }
121    #[doc = "Bits 4:5 - Port x configuration bits (y = 0..15)"]
122    #[inline(always)]
123    pub fn ospeedr2(&mut self) -> OSPEEDR2_W {
124        OSPEEDR2_W { w: self }
125    }
126    #[doc = "Bits 2:3 - Port x configuration bits (y = 0..15)"]
127    #[inline(always)]
128    pub fn ospeedr1(&mut self) -> OSPEEDR1_W {
129        OSPEEDR1_W { w: self }
130    }
131    #[doc = "Bits 0:1 - Port x configuration bits (y = 0..15)"]
132    #[inline(always)]
133    pub fn ospeedr0(&mut self) -> OSPEEDR0_W {
134        OSPEEDR0_W { w: self }
135    }
136}
stm32wb_pac/gpioe/ospeedr.rs

stm32wb_pac/gpioe/
ospeedr.rs
