stm32wb_pac/flash/
srrvr.rs1#[doc = "Reader of register SRRVR"]
2pub type R = crate::R<u32, super::SRRVR>;
3#[doc = "Writer for register SRRVR"]
4pub type W = crate::W<u32, super::SRRVR>;
5#[doc = "Register SRRVR `reset()`'s with value 0x0100_0000"]
6impl crate::ResetValue for super::SRRVR {
7 type Type = u32;
8 #[inline(always)]
9 fn reset_value() -> Self::Type {
10 0x0100_0000
11 }
12}
13#[doc = "Reader of field `SBRV`"]
14pub type SBRV_R = crate::R<u32, u32>;
15#[doc = "Write proxy for field `SBRV`"]
16pub struct SBRV_W<'a> {
17 w: &'a mut W,
18}
19impl<'a> SBRV_W<'a> {
20 #[doc = r"Writes raw bits to the field"]
21 #[inline(always)]
22 pub unsafe fn bits(self, value: u32) -> &'a mut W {
23 self.w.bits = (self.w.bits & !0x0003_ffff) | ((value as u32) & 0x0003_ffff);
24 self.w
25 }
26}
27#[doc = "Reader of field `SBRSA`"]
28pub type SBRSA_R = crate::R<u8, u8>;
29#[doc = "Write proxy for field `SBRSA`"]
30pub struct SBRSA_W<'a> {
31 w: &'a mut W,
32}
33impl<'a> SBRSA_W<'a> {
34 #[doc = r"Writes raw bits to the field"]
35 #[inline(always)]
36 pub unsafe fn bits(self, value: u8) -> &'a mut W {
37 self.w.bits = (self.w.bits & !(0x1f << 18)) | (((value as u32) & 0x1f) << 18);
38 self.w
39 }
40}
41#[doc = "Reader of field `BRSD`"]
42pub type BRSD_R = crate::R<bool, bool>;
43#[doc = "Write proxy for field `BRSD`"]
44pub struct BRSD_W<'a> {
45 w: &'a mut W,
46}
47impl<'a> BRSD_W<'a> {
48 #[doc = r"Sets the field bit"]
49 #[inline(always)]
50 pub fn set_bit(self) -> &'a mut W {
51 self.bit(true)
52 }
53 #[doc = r"Clears the field bit"]
54 #[inline(always)]
55 pub fn clear_bit(self) -> &'a mut W {
56 self.bit(false)
57 }
58 #[doc = r"Writes raw bits to the field"]
59 #[inline(always)]
60 pub fn bit(self, value: bool) -> &'a mut W {
61 self.w.bits = (self.w.bits & !(0x01 << 23)) | (((value as u32) & 0x01) << 23);
62 self.w
63 }
64}
65#[doc = "Reader of field `SNBRSA`"]
66pub type SNBRSA_R = crate::R<u8, u8>;
67#[doc = "Write proxy for field `SNBRSA`"]
68pub struct SNBRSA_W<'a> {
69 w: &'a mut W,
70}
71impl<'a> SNBRSA_W<'a> {
72 #[doc = r"Writes raw bits to the field"]
73 #[inline(always)]
74 pub unsafe fn bits(self, value: u8) -> &'a mut W {
75 self.w.bits = (self.w.bits & !(0x1f << 25)) | (((value as u32) & 0x1f) << 25);
76 self.w
77 }
78}
79#[doc = "Reader of field `C2OPT`"]
80pub type C2OPT_R = crate::R<bool, bool>;
81#[doc = "Write proxy for field `C2OPT`"]
82pub struct C2OPT_W<'a> {
83 w: &'a mut W,
84}
85impl<'a> C2OPT_W<'a> {
86 #[doc = r"Sets the field bit"]
87 #[inline(always)]
88 pub fn set_bit(self) -> &'a mut W {
89 self.bit(true)
90 }
91 #[doc = r"Clears the field bit"]
92 #[inline(always)]
93 pub fn clear_bit(self) -> &'a mut W {
94 self.bit(false)
95 }
96 #[doc = r"Writes raw bits to the field"]
97 #[inline(always)]
98 pub fn bit(self, value: bool) -> &'a mut W {
99 self.w.bits = (self.w.bits & !(0x01 << 31)) | (((value as u32) & 0x01) << 31);
100 self.w
101 }
102}
103#[doc = "Reader of field `NBRSD`"]
104pub type NBRSD_R = crate::R<bool, bool>;
105#[doc = "Write proxy for field `NBRSD`"]
106pub struct NBRSD_W<'a> {
107 w: &'a mut W,
108}
109impl<'a> NBRSD_W<'a> {
110 #[doc = r"Sets the field bit"]
111 #[inline(always)]
112 pub fn set_bit(self) -> &'a mut W {
113 self.bit(true)
114 }
115 #[doc = r"Clears the field bit"]
116 #[inline(always)]
117 pub fn clear_bit(self) -> &'a mut W {
118 self.bit(false)
119 }
120 #[doc = r"Writes raw bits to the field"]
121 #[inline(always)]
122 pub fn bit(self, value: bool) -> &'a mut W {
123 self.w.bits = (self.w.bits & !(0x01 << 30)) | (((value as u32) & 0x01) << 30);
124 self.w
125 }
126}
127impl R {
128 #[doc = "Bits 0:17 - cortex M0 access control register"]
129 #[inline(always)]
130 pub fn sbrv(&self) -> SBRV_R {
131 SBRV_R::new((self.bits & 0x0003_ffff) as u32)
132 }
133 #[doc = "Bits 18:22 - Secure backup SRAM2a start address"]
134 #[inline(always)]
135 pub fn sbrsa(&self) -> SBRSA_R {
136 SBRSA_R::new(((self.bits >> 18) & 0x1f) as u8)
137 }
138 #[doc = "Bit 23 - backup SRAM2a security disable"]
139 #[inline(always)]
140 pub fn brsd(&self) -> BRSD_R {
141 BRSD_R::new(((self.bits >> 23) & 0x01) != 0)
142 }
143 #[doc = "Bits 25:29 - Secure non backup SRAM2a start address"]
144 #[inline(always)]
145 pub fn snbrsa(&self) -> SNBRSA_R {
146 SNBRSA_R::new(((self.bits >> 25) & 0x1f) as u8)
147 }
148 #[doc = "Bit 31 - CPU2 cortex M0 boot reset vector memory selection"]
149 #[inline(always)]
150 pub fn c2opt(&self) -> C2OPT_R {
151 C2OPT_R::new(((self.bits >> 31) & 0x01) != 0)
152 }
153 #[doc = "Bit 30 - non-backup SRAM2b security disable"]
154 #[inline(always)]
155 pub fn nbrsd(&self) -> NBRSD_R {
156 NBRSD_R::new(((self.bits >> 30) & 0x01) != 0)
157 }
158}
159impl W {
160 #[doc = "Bits 0:17 - cortex M0 access control register"]
161 #[inline(always)]
162 pub fn sbrv(&mut self) -> SBRV_W {
163 SBRV_W { w: self }
164 }
165 #[doc = "Bits 18:22 - Secure backup SRAM2a start address"]
166 #[inline(always)]
167 pub fn sbrsa(&mut self) -> SBRSA_W {
168 SBRSA_W { w: self }
169 }
170 #[doc = "Bit 23 - backup SRAM2a security disable"]
171 #[inline(always)]
172 pub fn brsd(&mut self) -> BRSD_W {
173 BRSD_W { w: self }
174 }
175 #[doc = "Bits 25:29 - Secure non backup SRAM2a start address"]
176 #[inline(always)]
177 pub fn snbrsa(&mut self) -> SNBRSA_W {
178 SNBRSA_W { w: self }
179 }
180 #[doc = "Bit 31 - CPU2 cortex M0 boot reset vector memory selection"]
181 #[inline(always)]
182 pub fn c2opt(&mut self) -> C2OPT_W {
183 C2OPT_W { w: self }
184 }
185 #[doc = "Bit 30 - non-backup SRAM2b security disable"]
186 #[inline(always)]
187 pub fn nbrsd(&mut self) -> NBRSD_W {
188 NBRSD_W { w: self }
189 }
190}