stm32wb_pac/adc/
tr3.rs

1#[doc = "Reader of register TR3"]
2pub type R = crate::R<u32, super::TR3>;
3#[doc = "Writer for register TR3"]
4pub type W = crate::W<u32, super::TR3>;
5#[doc = "Register TR3 `reset()`'s with value 0x0fff_0000"]
6impl crate::ResetValue for super::TR3 {
7    type Type = u32;
8    #[inline(always)]
9    fn reset_value() -> Self::Type {
10        0x0fff_0000
11    }
12}
13#[doc = "Reader of field `HT3`"]
14pub type HT3_R = crate::R<u8, u8>;
15#[doc = "Write proxy for field `HT3`"]
16pub struct HT3_W<'a> {
17    w: &'a mut W,
18}
19impl<'a> HT3_W<'a> {
20    #[doc = r"Writes raw bits to the field"]
21    #[inline(always)]
22    pub unsafe fn bits(self, value: u8) -> &'a mut W {
23        self.w.bits = (self.w.bits & !(0xff << 16)) | (((value as u32) & 0xff) << 16);
24        self.w
25    }
26}
27#[doc = "Reader of field `LT3`"]
28pub type LT3_R = crate::R<u8, u8>;
29#[doc = "Write proxy for field `LT3`"]
30pub struct LT3_W<'a> {
31    w: &'a mut W,
32}
33impl<'a> LT3_W<'a> {
34    #[doc = r"Writes raw bits to the field"]
35    #[inline(always)]
36    pub unsafe fn bits(self, value: u8) -> &'a mut W {
37        self.w.bits = (self.w.bits & !0xff) | ((value as u32) & 0xff);
38        self.w
39    }
40}
41impl R {
42    #[doc = "Bits 16:23 - ADC analog watchdog 3 threshold high"]
43    #[inline(always)]
44    pub fn ht3(&self) -> HT3_R {
45        HT3_R::new(((self.bits >> 16) & 0xff) as u8)
46    }
47    #[doc = "Bits 0:7 - ADC analog watchdog 3 threshold low"]
48    #[inline(always)]
49    pub fn lt3(&self) -> LT3_R {
50        LT3_R::new((self.bits & 0xff) as u8)
51    }
52}
53impl W {
54    #[doc = "Bits 16:23 - ADC analog watchdog 3 threshold high"]
55    #[inline(always)]
56    pub fn ht3(&mut self) -> HT3_W {
57        HT3_W { w: self }
58    }
59    #[doc = "Bits 0:7 - ADC analog watchdog 3 threshold low"]
60    #[inline(always)]
61    pub fn lt3(&mut self) -> LT3_W {
62        LT3_W { w: self }
63    }
64}
stm32wb_pac/adc/tr3.rs

stm32wb_pac/adc/
tr3.rs
