stm32u5/stm32u5a5/usart1/
icr.rs

1///Register `ICR` writer
2pub type W = crate::W<ICRrs>;
3/**Parity error clear flag
4
5Value on reset: 0*/
6#[cfg_attr(feature = "defmt", derive(defmt::Format))]
7#[derive(Clone, Copy, Debug, PartialEq, Eq)]
8pub enum PECF {
9    ///1: Clears the PE flag in the ISR register
10    Clear = 1,
11}
12impl From<PECF> for bool {
13    #[inline(always)]
14    fn from(variant: PECF) -> Self {
15        variant as u8 != 0
16    }
17}
18///Field `PECF` writer - Parity error clear flag
19pub type PECF_W<'a, REG> = crate::BitWriter1C<'a, REG, PECF>;
20impl<'a, REG> PECF_W<'a, REG>
21where
22    REG: crate::Writable + crate::RegisterSpec,
23{
24    ///Clears the PE flag in the ISR register
25    #[inline(always)]
26    pub fn clear(self) -> &'a mut crate::W<REG> {
27        self.variant(PECF::Clear)
28    }
29}
30/**Framing error clear flag
31
32Value on reset: 0*/
33#[cfg_attr(feature = "defmt", derive(defmt::Format))]
34#[derive(Clone, Copy, Debug, PartialEq, Eq)]
35pub enum FECF {
36    ///1: Clears the FE flag in the ISR register
37    Clear = 1,
38}
39impl From<FECF> for bool {
40    #[inline(always)]
41    fn from(variant: FECF) -> Self {
42        variant as u8 != 0
43    }
44}
45///Field `FECF` writer - Framing error clear flag
46pub type FECF_W<'a, REG> = crate::BitWriter1C<'a, REG, FECF>;
47impl<'a, REG> FECF_W<'a, REG>
48where
49    REG: crate::Writable + crate::RegisterSpec,
50{
51    ///Clears the FE flag in the ISR register
52    #[inline(always)]
53    pub fn clear(self) -> &'a mut crate::W<REG> {
54        self.variant(FECF::Clear)
55    }
56}
57/**Noise detected clear flag
58
59Value on reset: 0*/
60#[cfg_attr(feature = "defmt", derive(defmt::Format))]
61#[derive(Clone, Copy, Debug, PartialEq, Eq)]
62pub enum NECF {
63    ///1: Clears the NF flag in the ISR register
64    Clear = 1,
65}
66impl From<NECF> for bool {
67    #[inline(always)]
68    fn from(variant: NECF) -> Self {
69        variant as u8 != 0
70    }
71}
72///Field `NECF` writer - Noise detected clear flag
73pub type NECF_W<'a, REG> = crate::BitWriter1C<'a, REG, NECF>;
74impl<'a, REG> NECF_W<'a, REG>
75where
76    REG: crate::Writable + crate::RegisterSpec,
77{
78    ///Clears the NF flag in the ISR register
79    #[inline(always)]
80    pub fn clear(self) -> &'a mut crate::W<REG> {
81        self.variant(NECF::Clear)
82    }
83}
84/**Overrun error clear flag
85
86Value on reset: 0*/
87#[cfg_attr(feature = "defmt", derive(defmt::Format))]
88#[derive(Clone, Copy, Debug, PartialEq, Eq)]
89pub enum ORECF {
90    ///1: Clears the ORE flag in the ISR register
91    Clear = 1,
92}
93impl From<ORECF> for bool {
94    #[inline(always)]
95    fn from(variant: ORECF) -> Self {
96        variant as u8 != 0
97    }
98}
99///Field `ORECF` writer - Overrun error clear flag
100pub type ORECF_W<'a, REG> = crate::BitWriter1C<'a, REG, ORECF>;
101impl<'a, REG> ORECF_W<'a, REG>
102where
103    REG: crate::Writable + crate::RegisterSpec,
104{
105    ///Clears the ORE flag in the ISR register
106    #[inline(always)]
107    pub fn clear(self) -> &'a mut crate::W<REG> {
108        self.variant(ORECF::Clear)
109    }
110}
111/**Idle line detected clear flag
112
113Value on reset: 0*/
114#[cfg_attr(feature = "defmt", derive(defmt::Format))]
115#[derive(Clone, Copy, Debug, PartialEq, Eq)]
116pub enum IDLECF {
117    ///1: Clears the IDLE flag in the ISR register
118    Clear = 1,
119}
120impl From<IDLECF> for bool {
121    #[inline(always)]
122    fn from(variant: IDLECF) -> Self {
123        variant as u8 != 0
124    }
125}
126///Field `IDLECF` writer - Idle line detected clear flag
127pub type IDLECF_W<'a, REG> = crate::BitWriter1C<'a, REG, IDLECF>;
128impl<'a, REG> IDLECF_W<'a, REG>
129where
130    REG: crate::Writable + crate::RegisterSpec,
131{
132    ///Clears the IDLE flag in the ISR register
133    #[inline(always)]
134    pub fn clear(self) -> &'a mut crate::W<REG> {
135        self.variant(IDLECF::Clear)
136    }
137}
138/**TXFECF
139
140Value on reset: 0*/
141#[cfg_attr(feature = "defmt", derive(defmt::Format))]
142#[derive(Clone, Copy, Debug, PartialEq, Eq)]
143pub enum TXFECF {
144    ///1: Clear the TXFE flag in the ISR register
145    Clear = 1,
146}
147impl From<TXFECF> for bool {
148    #[inline(always)]
149    fn from(variant: TXFECF) -> Self {
150        variant as u8 != 0
151    }
152}
153///Field `TXFECF` writer - TXFECF
154pub type TXFECF_W<'a, REG> = crate::BitWriter1C<'a, REG, TXFECF>;
155impl<'a, REG> TXFECF_W<'a, REG>
156where
157    REG: crate::Writable + crate::RegisterSpec,
158{
159    ///Clear the TXFE flag in the ISR register
160    #[inline(always)]
161    pub fn clear(self) -> &'a mut crate::W<REG> {
162        self.variant(TXFECF::Clear)
163    }
164}
165/**Transmission complete clear flag
166
167Value on reset: 0*/
168#[cfg_attr(feature = "defmt", derive(defmt::Format))]
169#[derive(Clone, Copy, Debug, PartialEq, Eq)]
170pub enum TCCF {
171    ///1: Clears the TC flag in the ISR register
172    Clear = 1,
173}
174impl From<TCCF> for bool {
175    #[inline(always)]
176    fn from(variant: TCCF) -> Self {
177        variant as u8 != 0
178    }
179}
180///Field `TCCF` writer - Transmission complete clear flag
181pub type TCCF_W<'a, REG> = crate::BitWriter1C<'a, REG, TCCF>;
182impl<'a, REG> TCCF_W<'a, REG>
183where
184    REG: crate::Writable + crate::RegisterSpec,
185{
186    ///Clears the TC flag in the ISR register
187    #[inline(always)]
188    pub fn clear(self) -> &'a mut crate::W<REG> {
189        self.variant(TCCF::Clear)
190    }
191}
192/**TCBGTCF
193
194Value on reset: 0*/
195#[cfg_attr(feature = "defmt", derive(defmt::Format))]
196#[derive(Clone, Copy, Debug, PartialEq, Eq)]
197pub enum TCBGTCF {
198    ///1: Clear the TCBGT flag in the ISR register
199    Clear = 1,
200}
201impl From<TCBGTCF> for bool {
202    #[inline(always)]
203    fn from(variant: TCBGTCF) -> Self {
204        variant as u8 != 0
205    }
206}
207///Field `TCBGTCF` writer - TCBGTCF
208pub type TCBGTCF_W<'a, REG> = crate::BitWriter1C<'a, REG, TCBGTCF>;
209impl<'a, REG> TCBGTCF_W<'a, REG>
210where
211    REG: crate::Writable + crate::RegisterSpec,
212{
213    ///Clear the TCBGT flag in the ISR register
214    #[inline(always)]
215    pub fn clear(self) -> &'a mut crate::W<REG> {
216        self.variant(TCBGTCF::Clear)
217    }
218}
219/**LIN break detection clear flag
220
221Value on reset: 0*/
222#[cfg_attr(feature = "defmt", derive(defmt::Format))]
223#[derive(Clone, Copy, Debug, PartialEq, Eq)]
224pub enum LBDCF {
225    ///1: Clears the LBDF flag in the ISR register
226    Clear = 1,
227}
228impl From<LBDCF> for bool {
229    #[inline(always)]
230    fn from(variant: LBDCF) -> Self {
231        variant as u8 != 0
232    }
233}
234///Field `LBDCF` writer - LIN break detection clear flag
235pub type LBDCF_W<'a, REG> = crate::BitWriter1C<'a, REG, LBDCF>;
236impl<'a, REG> LBDCF_W<'a, REG>
237where
238    REG: crate::Writable + crate::RegisterSpec,
239{
240    ///Clears the LBDF flag in the ISR register
241    #[inline(always)]
242    pub fn clear(self) -> &'a mut crate::W<REG> {
243        self.variant(LBDCF::Clear)
244    }
245}
246/**CTS clear flag
247
248Value on reset: 0*/
249#[cfg_attr(feature = "defmt", derive(defmt::Format))]
250#[derive(Clone, Copy, Debug, PartialEq, Eq)]
251pub enum CTSCF {
252    ///1: Clears the CTSIF flag in the ISR register
253    Clear = 1,
254}
255impl From<CTSCF> for bool {
256    #[inline(always)]
257    fn from(variant: CTSCF) -> Self {
258        variant as u8 != 0
259    }
260}
261///Field `CTSCF` writer - CTS clear flag
262pub type CTSCF_W<'a, REG> = crate::BitWriter1C<'a, REG, CTSCF>;
263impl<'a, REG> CTSCF_W<'a, REG>
264where
265    REG: crate::Writable + crate::RegisterSpec,
266{
267    ///Clears the CTSIF flag in the ISR register
268    #[inline(always)]
269    pub fn clear(self) -> &'a mut crate::W<REG> {
270        self.variant(CTSCF::Clear)
271    }
272}
273/**Receiver timeout clear flag
274
275Value on reset: 0*/
276#[cfg_attr(feature = "defmt", derive(defmt::Format))]
277#[derive(Clone, Copy, Debug, PartialEq, Eq)]
278pub enum RTOCF {
279    ///1: Clears the RTOF flag in the ISR register
280    Clear = 1,
281}
282impl From<RTOCF> for bool {
283    #[inline(always)]
284    fn from(variant: RTOCF) -> Self {
285        variant as u8 != 0
286    }
287}
288///Field `RTOCF` writer - Receiver timeout clear flag
289pub type RTOCF_W<'a, REG> = crate::BitWriter1C<'a, REG, RTOCF>;
290impl<'a, REG> RTOCF_W<'a, REG>
291where
292    REG: crate::Writable + crate::RegisterSpec,
293{
294    ///Clears the RTOF flag in the ISR register
295    #[inline(always)]
296    pub fn clear(self) -> &'a mut crate::W<REG> {
297        self.variant(RTOCF::Clear)
298    }
299}
300/**End of block clear flag
301
302Value on reset: 0*/
303#[cfg_attr(feature = "defmt", derive(defmt::Format))]
304#[derive(Clone, Copy, Debug, PartialEq, Eq)]
305pub enum EOBCF {
306    ///1: Clears the EOBF flag in the ISR register
307    Clear = 1,
308}
309impl From<EOBCF> for bool {
310    #[inline(always)]
311    fn from(variant: EOBCF) -> Self {
312        variant as u8 != 0
313    }
314}
315///Field `EOBCF` writer - End of block clear flag
316pub type EOBCF_W<'a, REG> = crate::BitWriter1C<'a, REG, EOBCF>;
317impl<'a, REG> EOBCF_W<'a, REG>
318where
319    REG: crate::Writable + crate::RegisterSpec,
320{
321    ///Clears the EOBF flag in the ISR register
322    #[inline(always)]
323    pub fn clear(self) -> &'a mut crate::W<REG> {
324        self.variant(EOBCF::Clear)
325    }
326}
327/**UDRCF
328
329Value on reset: 0*/
330#[cfg_attr(feature = "defmt", derive(defmt::Format))]
331#[derive(Clone, Copy, Debug, PartialEq, Eq)]
332pub enum UDRCF {
333    ///1: Clear the UDR flag in the ISR register
334    Clear = 1,
335}
336impl From<UDRCF> for bool {
337    #[inline(always)]
338    fn from(variant: UDRCF) -> Self {
339        variant as u8 != 0
340    }
341}
342///Field `UDRCF` writer - UDRCF
343pub type UDRCF_W<'a, REG> = crate::BitWriter1C<'a, REG, UDRCF>;
344impl<'a, REG> UDRCF_W<'a, REG>
345where
346    REG: crate::Writable + crate::RegisterSpec,
347{
348    ///Clear the UDR flag in the ISR register
349    #[inline(always)]
350    pub fn clear(self) -> &'a mut crate::W<REG> {
351        self.variant(UDRCF::Clear)
352    }
353}
354/**Character match clear flag
355
356Value on reset: 0*/
357#[cfg_attr(feature = "defmt", derive(defmt::Format))]
358#[derive(Clone, Copy, Debug, PartialEq, Eq)]
359pub enum CMCF {
360    ///1: Clears the CMF flag in the ISR register
361    Clear = 1,
362}
363impl From<CMCF> for bool {
364    #[inline(always)]
365    fn from(variant: CMCF) -> Self {
366        variant as u8 != 0
367    }
368}
369///Field `CMCF` writer - Character match clear flag
370pub type CMCF_W<'a, REG> = crate::BitWriter1C<'a, REG, CMCF>;
371impl<'a, REG> CMCF_W<'a, REG>
372where
373    REG: crate::Writable + crate::RegisterSpec,
374{
375    ///Clears the CMF flag in the ISR register
376    #[inline(always)]
377    pub fn clear(self) -> &'a mut crate::W<REG> {
378        self.variant(CMCF::Clear)
379    }
380}
381impl core::fmt::Debug for crate::generic::Reg<ICRrs> {
382    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
383        write!(f, "(not readable)")
384    }
385}
386impl W {
387    ///Bit 0 - Parity error clear flag
388    #[inline(always)]
389    pub fn pecf(&mut self) -> PECF_W<ICRrs> {
390        PECF_W::new(self, 0)
391    }
392    ///Bit 1 - Framing error clear flag
393    #[inline(always)]
394    pub fn fecf(&mut self) -> FECF_W<ICRrs> {
395        FECF_W::new(self, 1)
396    }
397    ///Bit 2 - Noise detected clear flag
398    #[inline(always)]
399    pub fn necf(&mut self) -> NECF_W<ICRrs> {
400        NECF_W::new(self, 2)
401    }
402    ///Bit 3 - Overrun error clear flag
403    #[inline(always)]
404    pub fn orecf(&mut self) -> ORECF_W<ICRrs> {
405        ORECF_W::new(self, 3)
406    }
407    ///Bit 4 - Idle line detected clear flag
408    #[inline(always)]
409    pub fn idlecf(&mut self) -> IDLECF_W<ICRrs> {
410        IDLECF_W::new(self, 4)
411    }
412    ///Bit 5 - TXFECF
413    #[inline(always)]
414    pub fn txfecf(&mut self) -> TXFECF_W<ICRrs> {
415        TXFECF_W::new(self, 5)
416    }
417    ///Bit 6 - Transmission complete clear flag
418    #[inline(always)]
419    pub fn tccf(&mut self) -> TCCF_W<ICRrs> {
420        TCCF_W::new(self, 6)
421    }
422    ///Bit 7 - TCBGTCF
423    #[inline(always)]
424    pub fn tcbgtcf(&mut self) -> TCBGTCF_W<ICRrs> {
425        TCBGTCF_W::new(self, 7)
426    }
427    ///Bit 8 - LIN break detection clear flag
428    #[inline(always)]
429    pub fn lbdcf(&mut self) -> LBDCF_W<ICRrs> {
430        LBDCF_W::new(self, 8)
431    }
432    ///Bit 9 - CTS clear flag
433    #[inline(always)]
434    pub fn ctscf(&mut self) -> CTSCF_W<ICRrs> {
435        CTSCF_W::new(self, 9)
436    }
437    ///Bit 11 - Receiver timeout clear flag
438    #[inline(always)]
439    pub fn rtocf(&mut self) -> RTOCF_W<ICRrs> {
440        RTOCF_W::new(self, 11)
441    }
442    ///Bit 12 - End of block clear flag
443    #[inline(always)]
444    pub fn eobcf(&mut self) -> EOBCF_W<ICRrs> {
445        EOBCF_W::new(self, 12)
446    }
447    ///Bit 13 - UDRCF
448    #[inline(always)]
449    pub fn udrcf(&mut self) -> UDRCF_W<ICRrs> {
450        UDRCF_W::new(self, 13)
451    }
452    ///Bit 17 - Character match clear flag
453    #[inline(always)]
454    pub fn cmcf(&mut self) -> CMCF_W<ICRrs> {
455        CMCF_W::new(self, 17)
456    }
457}
458/**Interrupt flag clear register
459
460You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`icr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api).
461
462See register [structure](https://stm32-rs.github.io/stm32-rs/STM32U5A5.html#USART1:ICR)*/
463pub struct ICRrs;
464impl crate::RegisterSpec for ICRrs {
465    type Ux = u32;
466}
467///`write(|w| ..)` method takes [`icr::W`](W) writer structure
468impl crate::Writable for ICRrs {
469    type Safety = crate::Unsafe;
470    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0x0002_3bff;
471}
472///`reset()` method sets ICR to value 0
473impl crate::Resettable for ICRrs {}
stm32u5/stm32u5a5/usart1/icr.rs

stm32u5/stm32u5a5/usart1/
icr.rs
