stm32u5/stm32u5a5/ramcfg/
m4erkeyr.rs

1///Register `M4ERKEYR` writer
2pub type W = crate::W<M4ERKEYRrs>;
3///Field `ERASEKEY` writer - ERASEKEY
4pub type ERASEKEY_W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
5impl core::fmt::Debug for crate::generic::Reg<M4ERKEYRrs> {
6    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
7        write!(f, "(not readable)")
8    }
9}
10impl W {
11    ///Bits 0:7 - ERASEKEY
12    #[inline(always)]
13    pub fn erasekey(&mut self) -> ERASEKEY_W<M4ERKEYRrs> {
14        ERASEKEY_W::new(self, 0)
15    }
16}
17/**RAMCFG SRAM x erase key register
18
19You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`m4erkeyr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api).
20
21See register [structure](https://stm32-rs.github.io/stm32-rs/STM32U5A5.html#RAMCFG:M4ERKEYR)*/
22pub struct M4ERKEYRrs;
23impl crate::RegisterSpec for M4ERKEYRrs {
24    type Ux = u32;
25}
26///`write(|w| ..)` method takes [`m4erkeyr::W`](W) writer structure
27impl crate::Writable for M4ERKEYRrs {
28    type Safety = crate::Unsafe;
29}
30///`reset()` method sets M4ERKEYR to value 0
31impl crate::Resettable for M4ERKEYRrs {}
stm32u5/stm32u5a5/ramcfg/m4erkeyr.rs

stm32u5/stm32u5a5/ramcfg/
m4erkeyr.rs
