stm32u5/stm32u599/ramcfg/
ram1erkeyr.rs

1///Register `RAM1ERKEYR` writer
2pub type W = crate::W<RAM1ERKEYRrs>;
3///Field `ERASEKEY` writer - ERASEKEY
4pub type ERASEKEY_W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
5impl core::fmt::Debug for crate::generic::Reg<RAM1ERKEYRrs> {
6    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
7        write!(f, "(not readable)")
8    }
9}
10impl W {
11    ///Bits 0:7 - ERASEKEY
12    #[inline(always)]
13    pub fn erasekey(&mut self) -> ERASEKEY_W<RAM1ERKEYRrs> {
14        ERASEKEY_W::new(self, 0)
15    }
16}
17/**RAMCFG SRAM x erase key register
18
19You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ram1erkeyr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api).
20
21See register [structure](https://stm32-rs.github.io/stm32-rs/STM32U599.html#RAMCFG:RAM1ERKEYR)*/
22pub struct RAM1ERKEYRrs;
23impl crate::RegisterSpec for RAM1ERKEYRrs {
24    type Ux = u32;
25}
26///`write(|w| ..)` method takes [`ram1erkeyr::W`](W) writer structure
27impl crate::Writable for RAM1ERKEYRrs {
28    type Safety = crate::Unsafe;
29}
30///`reset()` method sets RAM1ERKEYR to value 0
31impl crate::Resettable for RAM1ERKEYRrs {}
stm32u5/stm32u599/ramcfg/ram1erkeyr.rs

stm32u5/stm32u599/ramcfg/
ram1erkeyr.rs
