stm32u5/stm32u599/dsi/
fir1.rs

1///Register `FIR1` writer
2pub type W = crate::W<FIR1rs>;
3///Field `FTOHSTX` writer - Force timeout high-speed transmission Writing one to this bit forces a timeout high-speed transmission.
4pub type FTOHSTX_W<'a, REG> = crate::BitWriter<'a, REG>;
5///Field `FTOLPRX` writer - Force timeout low-power reception Writing one to this bit forces a timeout low-power reception.
6pub type FTOLPRX_W<'a, REG> = crate::BitWriter<'a, REG>;
7///Field `FECCSE` writer - Force ECC single-bit error Writing one to this bit forces a ECC single-bit error.
8pub type FECCSE_W<'a, REG> = crate::BitWriter<'a, REG>;
9///Field `FECCME` writer - Force ECC multi-bit error Writing one to this bit forces a ECC multi-bit error.
10pub type FECCME_W<'a, REG> = crate::BitWriter<'a, REG>;
11///Field `FCRCE` writer - Force CRC error Writing one to this bit forces a CRC error.
12pub type FCRCE_W<'a, REG> = crate::BitWriter<'a, REG>;
13///Field `FPSE` writer - Force packet size error Writing one to this bit forces a packet size error.
14pub type FPSE_W<'a, REG> = crate::BitWriter<'a, REG>;
15///Field `FEOTPE` writer - Force EoTp error Writing one to this bit forces a EoTp error.
16pub type FEOTPE_W<'a, REG> = crate::BitWriter<'a, REG>;
17///Field `FLPWRE` writer - Force LTDC payload write error Writing one to this bit forces a LTDC payload write error.
18pub type FLPWRE_W<'a, REG> = crate::BitWriter<'a, REG>;
19///Field `FGCWRE` writer - Force generic command write error Writing one to this bit forces a generic command write error.
20pub type FGCWRE_W<'a, REG> = crate::BitWriter<'a, REG>;
21///Field `FGPWRE` writer - Force generic payload write error Writing one to this bit forces a generic payload write error.
22pub type FGPWRE_W<'a, REG> = crate::BitWriter<'a, REG>;
23///Field `FGPTXE` writer - Force generic payload transmit error Writing one to this bit forces a generic payload transmit error.
24pub type FGPTXE_W<'a, REG> = crate::BitWriter<'a, REG>;
25///Field `FGPRDE` writer - Force generic payload read error Writing one to this bit forces a generic payload read error.
26pub type FGPRDE_W<'a, REG> = crate::BitWriter<'a, REG>;
27///Field `FGPRXE` writer - Force generic payload receive error Writing one to this bit forces a generic payload receive error.
28pub type FGPRXE_W<'a, REG> = crate::BitWriter<'a, REG>;
29///Field `FPBUE` writer - Force payload buffer underflow error Writing one to this bit forces a payload undrflow error.
30pub type FPBUE_W<'a, REG> = crate::BitWriter<'a, REG>;
31impl core::fmt::Debug for crate::generic::Reg<FIR1rs> {
32    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
33        write!(f, "(not readable)")
34    }
35}
36impl W {
37    ///Bit 0 - Force timeout high-speed transmission Writing one to this bit forces a timeout high-speed transmission.
38    #[inline(always)]
39    pub fn ftohstx(&mut self) -> FTOHSTX_W<FIR1rs> {
40        FTOHSTX_W::new(self, 0)
41    }
42    ///Bit 1 - Force timeout low-power reception Writing one to this bit forces a timeout low-power reception.
43    #[inline(always)]
44    pub fn ftolprx(&mut self) -> FTOLPRX_W<FIR1rs> {
45        FTOLPRX_W::new(self, 1)
46    }
47    ///Bit 2 - Force ECC single-bit error Writing one to this bit forces a ECC single-bit error.
48    #[inline(always)]
49    pub fn feccse(&mut self) -> FECCSE_W<FIR1rs> {
50        FECCSE_W::new(self, 2)
51    }
52    ///Bit 3 - Force ECC multi-bit error Writing one to this bit forces a ECC multi-bit error.
53    #[inline(always)]
54    pub fn feccme(&mut self) -> FECCME_W<FIR1rs> {
55        FECCME_W::new(self, 3)
56    }
57    ///Bit 4 - Force CRC error Writing one to this bit forces a CRC error.
58    #[inline(always)]
59    pub fn fcrce(&mut self) -> FCRCE_W<FIR1rs> {
60        FCRCE_W::new(self, 4)
61    }
62    ///Bit 5 - Force packet size error Writing one to this bit forces a packet size error.
63    #[inline(always)]
64    pub fn fpse(&mut self) -> FPSE_W<FIR1rs> {
65        FPSE_W::new(self, 5)
66    }
67    ///Bit 6 - Force EoTp error Writing one to this bit forces a EoTp error.
68    #[inline(always)]
69    pub fn feotpe(&mut self) -> FEOTPE_W<FIR1rs> {
70        FEOTPE_W::new(self, 6)
71    }
72    ///Bit 7 - Force LTDC payload write error Writing one to this bit forces a LTDC payload write error.
73    #[inline(always)]
74    pub fn flpwre(&mut self) -> FLPWRE_W<FIR1rs> {
75        FLPWRE_W::new(self, 7)
76    }
77    ///Bit 8 - Force generic command write error Writing one to this bit forces a generic command write error.
78    #[inline(always)]
79    pub fn fgcwre(&mut self) -> FGCWRE_W<FIR1rs> {
80        FGCWRE_W::new(self, 8)
81    }
82    ///Bit 9 - Force generic payload write error Writing one to this bit forces a generic payload write error.
83    #[inline(always)]
84    pub fn fgpwre(&mut self) -> FGPWRE_W<FIR1rs> {
85        FGPWRE_W::new(self, 9)
86    }
87    ///Bit 10 - Force generic payload transmit error Writing one to this bit forces a generic payload transmit error.
88    #[inline(always)]
89    pub fn fgptxe(&mut self) -> FGPTXE_W<FIR1rs> {
90        FGPTXE_W::new(self, 10)
91    }
92    ///Bit 11 - Force generic payload read error Writing one to this bit forces a generic payload read error.
93    #[inline(always)]
94    pub fn fgprde(&mut self) -> FGPRDE_W<FIR1rs> {
95        FGPRDE_W::new(self, 11)
96    }
97    ///Bit 12 - Force generic payload receive error Writing one to this bit forces a generic payload receive error.
98    #[inline(always)]
99    pub fn fgprxe(&mut self) -> FGPRXE_W<FIR1rs> {
100        FGPRXE_W::new(self, 12)
101    }
102    ///Bit 19 - Force payload buffer underflow error Writing one to this bit forces a payload undrflow error.
103    #[inline(always)]
104    pub fn fpbue(&mut self) -> FPBUE_W<FIR1rs> {
105        FPBUE_W::new(self, 19)
106    }
107}
108/**DSI Host force interrupt register 1
109
110You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`fir1::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api).
111
112See register [structure](https://stm32-rs.github.io/stm32-rs/STM32U599.html#DSI:FIR1)*/
113pub struct FIR1rs;
114impl crate::RegisterSpec for FIR1rs {
115    type Ux = u32;
116}
117///`write(|w| ..)` method takes [`fir1::W`](W) writer structure
118impl crate::Writable for FIR1rs {
119    type Safety = crate::Unsafe;
120}
121///`reset()` method sets FIR1 to value 0
122impl crate::Resettable for FIR1rs {}
stm32u5/stm32u599/dsi/fir1.rs

stm32u5/stm32u599/dsi/
fir1.rs
