stm32u5/stm32u595/usart1/
rqr.rs

1///Register `RQR` writer
2pub type W = crate::W<RQRrs>;
3/**Auto baud rate request
4
5Value on reset: 0*/
6#[cfg_attr(feature = "defmt", derive(defmt::Format))]
7#[derive(Clone, Copy, Debug, PartialEq, Eq)]
8pub enum ABRRQ {
9    ///1: resets the ABRF flag in the USART_ISR and request an automatic baud rate measurement on the next received data frame
10    Request = 1,
11}
12impl From<ABRRQ> for bool {
13    #[inline(always)]
14    fn from(variant: ABRRQ) -> Self {
15        variant as u8 != 0
16    }
17}
18///Field `ABRRQ` writer - Auto baud rate request
19pub type ABRRQ_W<'a, REG> = crate::BitWriter<'a, REG, ABRRQ>;
20impl<'a, REG> ABRRQ_W<'a, REG>
21where
22    REG: crate::Writable + crate::RegisterSpec,
23{
24    ///resets the ABRF flag in the USART_ISR and request an automatic baud rate measurement on the next received data frame
25    #[inline(always)]
26    pub fn request(self) -> &'a mut crate::W<REG> {
27        self.variant(ABRRQ::Request)
28    }
29}
30/**Send break request
31
32Value on reset: 0*/
33#[cfg_attr(feature = "defmt", derive(defmt::Format))]
34#[derive(Clone, Copy, Debug, PartialEq, Eq)]
35pub enum SBKRQ {
36    ///1: sets the SBKF flag and request to send a BREAK on the line, as soon as the transmit machine is available
37    Break = 1,
38}
39impl From<SBKRQ> for bool {
40    #[inline(always)]
41    fn from(variant: SBKRQ) -> Self {
42        variant as u8 != 0
43    }
44}
45///Field `SBKRQ` writer - Send break request
46pub type SBKRQ_W<'a, REG> = crate::BitWriter<'a, REG, SBKRQ>;
47impl<'a, REG> SBKRQ_W<'a, REG>
48where
49    REG: crate::Writable + crate::RegisterSpec,
50{
51    ///sets the SBKF flag and request to send a BREAK on the line, as soon as the transmit machine is available
52    #[inline(always)]
53    pub fn break_(self) -> &'a mut crate::W<REG> {
54        self.variant(SBKRQ::Break)
55    }
56}
57/**Mute mode request
58
59Value on reset: 0*/
60#[cfg_attr(feature = "defmt", derive(defmt::Format))]
61#[derive(Clone, Copy, Debug, PartialEq, Eq)]
62pub enum MMRQ {
63    ///1: Puts the USART in mute mode and sets the RWU flag
64    Mute = 1,
65}
66impl From<MMRQ> for bool {
67    #[inline(always)]
68    fn from(variant: MMRQ) -> Self {
69        variant as u8 != 0
70    }
71}
72///Field `MMRQ` writer - Mute mode request
73pub type MMRQ_W<'a, REG> = crate::BitWriter<'a, REG, MMRQ>;
74impl<'a, REG> MMRQ_W<'a, REG>
75where
76    REG: crate::Writable + crate::RegisterSpec,
77{
78    ///Puts the USART in mute mode and sets the RWU flag
79    #[inline(always)]
80    pub fn mute(self) -> &'a mut crate::W<REG> {
81        self.variant(MMRQ::Mute)
82    }
83}
84/**Receive data flush request
85
86Value on reset: 0*/
87#[cfg_attr(feature = "defmt", derive(defmt::Format))]
88#[derive(Clone, Copy, Debug, PartialEq, Eq)]
89pub enum RXFRQ {
90    ///1: clears the RXNE flag. This allows to discard the received data without reading it, and avoid an overrun condition
91    Discard = 1,
92}
93impl From<RXFRQ> for bool {
94    #[inline(always)]
95    fn from(variant: RXFRQ) -> Self {
96        variant as u8 != 0
97    }
98}
99///Field `RXFRQ` writer - Receive data flush request
100pub type RXFRQ_W<'a, REG> = crate::BitWriter<'a, REG, RXFRQ>;
101impl<'a, REG> RXFRQ_W<'a, REG>
102where
103    REG: crate::Writable + crate::RegisterSpec,
104{
105    ///clears the RXNE flag. This allows to discard the received data without reading it, and avoid an overrun condition
106    #[inline(always)]
107    pub fn discard(self) -> &'a mut crate::W<REG> {
108        self.variant(RXFRQ::Discard)
109    }
110}
111/**Transmit data flush request
112
113Value on reset: 0*/
114#[cfg_attr(feature = "defmt", derive(defmt::Format))]
115#[derive(Clone, Copy, Debug, PartialEq, Eq)]
116pub enum TXFRQ {
117    ///1: Set the TXE flags. This allows to discard the transmit data
118    Discard = 1,
119}
120impl From<TXFRQ> for bool {
121    #[inline(always)]
122    fn from(variant: TXFRQ) -> Self {
123        variant as u8 != 0
124    }
125}
126///Field `TXFRQ` writer - Transmit data flush request
127pub type TXFRQ_W<'a, REG> = crate::BitWriter<'a, REG, TXFRQ>;
128impl<'a, REG> TXFRQ_W<'a, REG>
129where
130    REG: crate::Writable + crate::RegisterSpec,
131{
132    ///Set the TXE flags. This allows to discard the transmit data
133    #[inline(always)]
134    pub fn discard(self) -> &'a mut crate::W<REG> {
135        self.variant(TXFRQ::Discard)
136    }
137}
138impl core::fmt::Debug for crate::generic::Reg<RQRrs> {
139    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
140        write!(f, "(not readable)")
141    }
142}
143impl W {
144    ///Bit 0 - Auto baud rate request
145    #[inline(always)]
146    pub fn abrrq(&mut self) -> ABRRQ_W<RQRrs> {
147        ABRRQ_W::new(self, 0)
148    }
149    ///Bit 1 - Send break request
150    #[inline(always)]
151    pub fn sbkrq(&mut self) -> SBKRQ_W<RQRrs> {
152        SBKRQ_W::new(self, 1)
153    }
154    ///Bit 2 - Mute mode request
155    #[inline(always)]
156    pub fn mmrq(&mut self) -> MMRQ_W<RQRrs> {
157        MMRQ_W::new(self, 2)
158    }
159    ///Bit 3 - Receive data flush request
160    #[inline(always)]
161    pub fn rxfrq(&mut self) -> RXFRQ_W<RQRrs> {
162        RXFRQ_W::new(self, 3)
163    }
164    ///Bit 4 - Transmit data flush request
165    #[inline(always)]
166    pub fn txfrq(&mut self) -> TXFRQ_W<RQRrs> {
167        TXFRQ_W::new(self, 4)
168    }
169}
170/**Request register
171
172You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rqr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api).
173
174See register [structure](https://stm32-rs.github.io/stm32-rs/STM32U595.html#USART1:RQR)*/
175pub struct RQRrs;
176impl crate::RegisterSpec for RQRrs {
177    type Ux = u32;
178}
179///`write(|w| ..)` method takes [`rqr::W`](W) writer structure
180impl crate::Writable for RQRrs {
181    type Safety = crate::Unsafe;
182}
183///`reset()` method sets RQR to value 0
184impl crate::Resettable for RQRrs {}
stm32u5/stm32u595/usart1/rqr.rs

stm32u5/stm32u595/usart1/
rqr.rs
