stm32u5/stm32u595/gpdma1/ch/
fcr.rs

1///Register `FCR` writer
2pub type W = crate::W<FCRrs>;
3///Field `TCF` writer - transfer complete flag clear - 0: no effect - 1: clears the corresponding TCF flag
4pub type TCF_W<'a, REG> = crate::BitWriter<'a, REG>;
5///Field `HTF` writer - half transfer flag clear - 0: no effect - 1: clears the corresponding HTF flag
6pub type HTF_W<'a, REG> = crate::BitWriter<'a, REG>;
7///Field `DTEF` writer - data transfer error flag clear - 0: no effect - 1: clears the corresponding DTEF flag
8pub type DTEF_W<'a, REG> = crate::BitWriter<'a, REG>;
9///Field `ULEF` writer - update link transfer error flag clear - 0: no effect - 1: clears the corresponding ULEF flag
10pub type ULEF_W<'a, REG> = crate::BitWriter<'a, REG>;
11///Field `USEF` writer - user setting error flag clear - 0: no effect - 1: clears the corresponding USEF flag
12pub type USEF_W<'a, REG> = crate::BitWriter<'a, REG>;
13///Field `SUSPF` writer - completed suspension flag clear - 0: no effect - 1: clears the corresponding SUSPF flag
14pub type SUSPF_W<'a, REG> = crate::BitWriter<'a, REG>;
15///Field `TOF` writer - trigger overrun flag clear
16pub type TOF_W<'a, REG> = crate::BitWriter<'a, REG>;
17impl core::fmt::Debug for crate::generic::Reg<FCRrs> {
18    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
19        write!(f, "(not readable)")
20    }
21}
22impl W {
23    ///Bit 8 - transfer complete flag clear - 0: no effect - 1: clears the corresponding TCF flag
24    #[inline(always)]
25    pub fn tcf(&mut self) -> TCF_W<FCRrs> {
26        TCF_W::new(self, 8)
27    }
28    ///Bit 9 - half transfer flag clear - 0: no effect - 1: clears the corresponding HTF flag
29    #[inline(always)]
30    pub fn htf(&mut self) -> HTF_W<FCRrs> {
31        HTF_W::new(self, 9)
32    }
33    ///Bit 10 - data transfer error flag clear - 0: no effect - 1: clears the corresponding DTEF flag
34    #[inline(always)]
35    pub fn dtef(&mut self) -> DTEF_W<FCRrs> {
36        DTEF_W::new(self, 10)
37    }
38    ///Bit 11 - update link transfer error flag clear - 0: no effect - 1: clears the corresponding ULEF flag
39    #[inline(always)]
40    pub fn ulef(&mut self) -> ULEF_W<FCRrs> {
41        ULEF_W::new(self, 11)
42    }
43    ///Bit 12 - user setting error flag clear - 0: no effect - 1: clears the corresponding USEF flag
44    #[inline(always)]
45    pub fn usef(&mut self) -> USEF_W<FCRrs> {
46        USEF_W::new(self, 12)
47    }
48    ///Bit 13 - completed suspension flag clear - 0: no effect - 1: clears the corresponding SUSPF flag
49    #[inline(always)]
50    pub fn suspf(&mut self) -> SUSPF_W<FCRrs> {
51        SUSPF_W::new(self, 13)
52    }
53    ///Bit 14 - trigger overrun flag clear
54    #[inline(always)]
55    pub fn tof(&mut self) -> TOF_W<FCRrs> {
56        TOF_W::new(self, 14)
57    }
58}
59/**GPDMA channel x flag clear register
60
61You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`fcr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api).*/
62pub struct FCRrs;
63impl crate::RegisterSpec for FCRrs {
64    type Ux = u32;
65}
66///`write(|w| ..)` method takes [`fcr::W`](W) writer structure
67impl crate::Writable for FCRrs {
68    type Safety = crate::Unsafe;
69}
70///`reset()` method sets FCR to value 0
71impl crate::Resettable for FCRrs {}
stm32u5/stm32u595/gpdma1/ch/fcr.rs

stm32u5/stm32u595/gpdma1/ch/
fcr.rs
