stm32u5/stm32u575/tamp/scr.rs
1///Register `SCR` writer
2pub type W = crate::W<SCRrs>;
3///Field `CTAMP1F` writer - Clear TAMP1 detection flag Writing 1 in this bit clears the TAMP1F bit in the TAMP_SR register.
4pub type CTAMP1F_W<'a, REG> = crate::BitWriter<'a, REG>;
5///Field `CTAMP2F` writer - Clear TAMP2 detection flag Writing 1 in this bit clears the TAMP2F bit in the TAMP_SR register.
6pub type CTAMP2F_W<'a, REG> = crate::BitWriter<'a, REG>;
7///Field `CTAMP3F` writer - Clear TAMP3 detection flag Writing 1 in this bit clears the TAMP3F bit in the TAMP_SR register.
8pub type CTAMP3F_W<'a, REG> = crate::BitWriter<'a, REG>;
9///Field `CTAMP4F` writer - Clear TAMP4 detection flag Writing 1 in this bit clears the TAMP4F bit in the TAMP_SR register.
10pub type CTAMP4F_W<'a, REG> = crate::BitWriter<'a, REG>;
11///Field `CTAMP5F` writer - Clear TAMP5 detection flag Writing 1 in this bit clears the TAMP5F bit in the TAMP_SR register.
12pub type CTAMP5F_W<'a, REG> = crate::BitWriter<'a, REG>;
13///Field `CTAMP6F` writer - Clear TAMP6 detection flag Writing 1 in this bit clears the TAMP6F bit in the TAMP_SR register.
14pub type CTAMP6F_W<'a, REG> = crate::BitWriter<'a, REG>;
15///Field `CTAMP7F` writer - Clear TAMP7 detection flag Writing 1 in this bit clears the TAMP7F bit in the TAMP_SR register.
16pub type CTAMP7F_W<'a, REG> = crate::BitWriter<'a, REG>;
17///Field `CTAMP8F` writer - Clear TAMP8 detection flag Writing 1 in this bit clears the TAMP8F bit in the TAMP_SR register.
18pub type CTAMP8F_W<'a, REG> = crate::BitWriter<'a, REG>;
19///Field `CITAMP1F` writer - Clear ITAMP1 detection flag Writing 1 in this bit clears the ITAMP1F bit in the TAMP_SR register.
20pub type CITAMP1F_W<'a, REG> = crate::BitWriter<'a, REG>;
21///Field `CITAMP2F` writer - Clear ITAMP2 detection flag Writing 1 in this bit clears the ITAMP2F bit in the TAMP_SR register.
22pub type CITAMP2F_W<'a, REG> = crate::BitWriter<'a, REG>;
23///Field `CITAMP3F` writer - Clear ITAMP3 detection flag Writing 1 in this bit clears the ITAMP3F bit in the TAMP_SR register.
24pub type CITAMP3F_W<'a, REG> = crate::BitWriter<'a, REG>;
25///Field `CITAMP5F` writer - Clear ITAMP5 detection flag Writing 1 in this bit clears the ITAMP5F bit in the TAMP_SR register.
26pub type CITAMP5F_W<'a, REG> = crate::BitWriter<'a, REG>;
27///Field `CITAMP6F` writer - Clear ITAMP6 detection flag Writing 1 in this bit clears the ITAMP6F bit in the TAMP_SR register.
28pub type CITAMP6F_W<'a, REG> = crate::BitWriter<'a, REG>;
29///Field `CITAMP7F` writer - Clear ITAMP7 detection flag Writing 1 in this bit clears the ITAMP7F bit in the TAMP_SR register.
30pub type CITAMP7F_W<'a, REG> = crate::BitWriter<'a, REG>;
31///Field `CITAMP8F` writer - Clear ITAMP8 detection flag Writing 1 in this bit clears the ITAMP8F bit in the TAMP_SR register.
32pub type CITAMP8F_W<'a, REG> = crate::BitWriter<'a, REG>;
33///Field `CITAMP9F` writer - Clear ITAMP9 detection flag Writing 1 in this bit clears the ITAMP9F bit in the TAMP_SR register.
34pub type CITAMP9F_W<'a, REG> = crate::BitWriter<'a, REG>;
35///Field `CITAMP11F` writer - Clear ITAMP11 detection flag Writing 1 in this bit clears the ITAMP11F bit in the TAMP_SR register.
36pub type CITAMP11F_W<'a, REG> = crate::BitWriter<'a, REG>;
37///Field `CITAMP12F` writer - Clear ITAMP12 detection flag Writing 1 in this bit clears the ITAMP12F bit in the TAMP_SR register.
38pub type CITAMP12F_W<'a, REG> = crate::BitWriter<'a, REG>;
39///Field `CITAMP13F` writer - Clear ITAMP13 detection flag Writing 1 in this bit clears the ITAMP13F bit in the TAMP_SR register.
40pub type CITAMP13F_W<'a, REG> = crate::BitWriter<'a, REG>;
41impl core::fmt::Debug for crate::generic::Reg<SCRrs> {
42 fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
43 write!(f, "(not readable)")
44 }
45}
46impl W {
47 ///Bit 0 - Clear TAMP1 detection flag Writing 1 in this bit clears the TAMP1F bit in the TAMP_SR register.
48 #[inline(always)]
49 pub fn ctamp1f(&mut self) -> CTAMP1F_W<SCRrs> {
50 CTAMP1F_W::new(self, 0)
51 }
52 ///Bit 1 - Clear TAMP2 detection flag Writing 1 in this bit clears the TAMP2F bit in the TAMP_SR register.
53 #[inline(always)]
54 pub fn ctamp2f(&mut self) -> CTAMP2F_W<SCRrs> {
55 CTAMP2F_W::new(self, 1)
56 }
57 ///Bit 2 - Clear TAMP3 detection flag Writing 1 in this bit clears the TAMP3F bit in the TAMP_SR register.
58 #[inline(always)]
59 pub fn ctamp3f(&mut self) -> CTAMP3F_W<SCRrs> {
60 CTAMP3F_W::new(self, 2)
61 }
62 ///Bit 3 - Clear TAMP4 detection flag Writing 1 in this bit clears the TAMP4F bit in the TAMP_SR register.
63 #[inline(always)]
64 pub fn ctamp4f(&mut self) -> CTAMP4F_W<SCRrs> {
65 CTAMP4F_W::new(self, 3)
66 }
67 ///Bit 4 - Clear TAMP5 detection flag Writing 1 in this bit clears the TAMP5F bit in the TAMP_SR register.
68 #[inline(always)]
69 pub fn ctamp5f(&mut self) -> CTAMP5F_W<SCRrs> {
70 CTAMP5F_W::new(self, 4)
71 }
72 ///Bit 5 - Clear TAMP6 detection flag Writing 1 in this bit clears the TAMP6F bit in the TAMP_SR register.
73 #[inline(always)]
74 pub fn ctamp6f(&mut self) -> CTAMP6F_W<SCRrs> {
75 CTAMP6F_W::new(self, 5)
76 }
77 ///Bit 6 - Clear TAMP7 detection flag Writing 1 in this bit clears the TAMP7F bit in the TAMP_SR register.
78 #[inline(always)]
79 pub fn ctamp7f(&mut self) -> CTAMP7F_W<SCRrs> {
80 CTAMP7F_W::new(self, 6)
81 }
82 ///Bit 7 - Clear TAMP8 detection flag Writing 1 in this bit clears the TAMP8F bit in the TAMP_SR register.
83 #[inline(always)]
84 pub fn ctamp8f(&mut self) -> CTAMP8F_W<SCRrs> {
85 CTAMP8F_W::new(self, 7)
86 }
87 ///Bit 16 - Clear ITAMP1 detection flag Writing 1 in this bit clears the ITAMP1F bit in the TAMP_SR register.
88 #[inline(always)]
89 pub fn citamp1f(&mut self) -> CITAMP1F_W<SCRrs> {
90 CITAMP1F_W::new(self, 16)
91 }
92 ///Bit 17 - Clear ITAMP2 detection flag Writing 1 in this bit clears the ITAMP2F bit in the TAMP_SR register.
93 #[inline(always)]
94 pub fn citamp2f(&mut self) -> CITAMP2F_W<SCRrs> {
95 CITAMP2F_W::new(self, 17)
96 }
97 ///Bit 18 - Clear ITAMP3 detection flag Writing 1 in this bit clears the ITAMP3F bit in the TAMP_SR register.
98 #[inline(always)]
99 pub fn citamp3f(&mut self) -> CITAMP3F_W<SCRrs> {
100 CITAMP3F_W::new(self, 18)
101 }
102 ///Bit 20 - Clear ITAMP5 detection flag Writing 1 in this bit clears the ITAMP5F bit in the TAMP_SR register.
103 #[inline(always)]
104 pub fn citamp5f(&mut self) -> CITAMP5F_W<SCRrs> {
105 CITAMP5F_W::new(self, 20)
106 }
107 ///Bit 21 - Clear ITAMP6 detection flag Writing 1 in this bit clears the ITAMP6F bit in the TAMP_SR register.
108 #[inline(always)]
109 pub fn citamp6f(&mut self) -> CITAMP6F_W<SCRrs> {
110 CITAMP6F_W::new(self, 21)
111 }
112 ///Bit 22 - Clear ITAMP7 detection flag Writing 1 in this bit clears the ITAMP7F bit in the TAMP_SR register.
113 #[inline(always)]
114 pub fn citamp7f(&mut self) -> CITAMP7F_W<SCRrs> {
115 CITAMP7F_W::new(self, 22)
116 }
117 ///Bit 23 - Clear ITAMP8 detection flag Writing 1 in this bit clears the ITAMP8F bit in the TAMP_SR register.
118 #[inline(always)]
119 pub fn citamp8f(&mut self) -> CITAMP8F_W<SCRrs> {
120 CITAMP8F_W::new(self, 23)
121 }
122 ///Bit 24 - Clear ITAMP9 detection flag Writing 1 in this bit clears the ITAMP9F bit in the TAMP_SR register.
123 #[inline(always)]
124 pub fn citamp9f(&mut self) -> CITAMP9F_W<SCRrs> {
125 CITAMP9F_W::new(self, 24)
126 }
127 ///Bit 26 - Clear ITAMP11 detection flag Writing 1 in this bit clears the ITAMP11F bit in the TAMP_SR register.
128 #[inline(always)]
129 pub fn citamp11f(&mut self) -> CITAMP11F_W<SCRrs> {
130 CITAMP11F_W::new(self, 26)
131 }
132 ///Bit 27 - Clear ITAMP12 detection flag Writing 1 in this bit clears the ITAMP12F bit in the TAMP_SR register.
133 #[inline(always)]
134 pub fn citamp12f(&mut self) -> CITAMP12F_W<SCRrs> {
135 CITAMP12F_W::new(self, 27)
136 }
137 ///Bit 28 - Clear ITAMP13 detection flag Writing 1 in this bit clears the ITAMP13F bit in the TAMP_SR register.
138 #[inline(always)]
139 pub fn citamp13f(&mut self) -> CITAMP13F_W<SCRrs> {
140 CITAMP13F_W::new(self, 28)
141 }
142}
143/**TAMP status clear register
144
145You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`scr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api).
146
147See register [structure](https://stm32-rs.github.io/stm32-rs/STM32U575.html#TAMP:SCR)*/
148pub struct SCRrs;
149impl crate::RegisterSpec for SCRrs {
150 type Ux = u32;
151}
152///`write(|w| ..)` method takes [`scr::W`](W) writer structure
153impl crate::Writable for SCRrs {
154 type Safety = crate::Unsafe;
155}
156///`reset()` method sets SCR to value 0
157impl crate::Resettable for SCRrs {}