stm32u5/stm32u545/aes/
cr.rs

1///Register `CR` reader
2pub type R = crate::R<CRrs>;
3///Register `CR` writer
4pub type W = crate::W<CRrs>;
5/**AES enable
6
7Value on reset: 0*/
8#[cfg_attr(feature = "defmt", derive(defmt::Format))]
9#[derive(Clone, Copy, Debug, PartialEq, Eq)]
10pub enum EN {
11    ///0: Disable AES
12    Disabled = 0,
13    ///1: Enable AES
14    Enabled = 1,
15}
16impl From<EN> for bool {
17    #[inline(always)]
18    fn from(variant: EN) -> Self {
19        variant as u8 != 0
20    }
21}
22///Field `EN` reader - AES enable
23pub type EN_R = crate::BitReader<EN>;
24impl EN_R {
25    ///Get enumerated values variant
26    #[inline(always)]
27    pub const fn variant(&self) -> EN {
28        match self.bits {
29            false => EN::Disabled,
30            true => EN::Enabled,
31        }
32    }
33    ///Disable AES
34    #[inline(always)]
35    pub fn is_disabled(&self) -> bool {
36        *self == EN::Disabled
37    }
38    ///Enable AES
39    #[inline(always)]
40    pub fn is_enabled(&self) -> bool {
41        *self == EN::Enabled
42    }
43}
44///Field `EN` writer - AES enable
45pub type EN_W<'a, REG> = crate::BitWriter<'a, REG, EN>;
46impl<'a, REG> EN_W<'a, REG>
47where
48    REG: crate::Writable + crate::RegisterSpec,
49{
50    ///Disable AES
51    #[inline(always)]
52    pub fn disabled(self) -> &'a mut crate::W<REG> {
53        self.variant(EN::Disabled)
54    }
55    ///Enable AES
56    #[inline(always)]
57    pub fn enabled(self) -> &'a mut crate::W<REG> {
58        self.variant(EN::Enabled)
59    }
60}
61/**Data type selection (for data in and data out to/from the cryptographic block)
62
63Value on reset: 0*/
64#[cfg_attr(feature = "defmt", derive(defmt::Format))]
65#[derive(Clone, Copy, Debug, PartialEq, Eq)]
66#[repr(u8)]
67pub enum DATATYPE {
68    ///0: Word
69    None = 0,
70    ///1: Half-word (16-bit)
71    HalfWord = 1,
72    ///2: Byte (8-bit)
73    Byte = 2,
74    ///3: Bit
75    Bit = 3,
76}
77impl From<DATATYPE> for u8 {
78    #[inline(always)]
79    fn from(variant: DATATYPE) -> Self {
80        variant as _
81    }
82}
83impl crate::FieldSpec for DATATYPE {
84    type Ux = u8;
85}
86impl crate::IsEnum for DATATYPE {}
87///Field `DATATYPE` reader - Data type selection (for data in and data out to/from the cryptographic block)
88pub type DATATYPE_R = crate::FieldReader<DATATYPE>;
89impl DATATYPE_R {
90    ///Get enumerated values variant
91    #[inline(always)]
92    pub const fn variant(&self) -> DATATYPE {
93        match self.bits {
94            0 => DATATYPE::None,
95            1 => DATATYPE::HalfWord,
96            2 => DATATYPE::Byte,
97            3 => DATATYPE::Bit,
98            _ => unreachable!(),
99        }
100    }
101    ///Word
102    #[inline(always)]
103    pub fn is_none(&self) -> bool {
104        *self == DATATYPE::None
105    }
106    ///Half-word (16-bit)
107    #[inline(always)]
108    pub fn is_half_word(&self) -> bool {
109        *self == DATATYPE::HalfWord
110    }
111    ///Byte (8-bit)
112    #[inline(always)]
113    pub fn is_byte(&self) -> bool {
114        *self == DATATYPE::Byte
115    }
116    ///Bit
117    #[inline(always)]
118    pub fn is_bit(&self) -> bool {
119        *self == DATATYPE::Bit
120    }
121}
122///Field `DATATYPE` writer - Data type selection (for data in and data out to/from the cryptographic block)
123pub type DATATYPE_W<'a, REG> = crate::FieldWriter<'a, REG, 2, DATATYPE, crate::Safe>;
124impl<'a, REG> DATATYPE_W<'a, REG>
125where
126    REG: crate::Writable + crate::RegisterSpec,
127    REG::Ux: From<u8>,
128{
129    ///Word
130    #[inline(always)]
131    pub fn none(self) -> &'a mut crate::W<REG> {
132        self.variant(DATATYPE::None)
133    }
134    ///Half-word (16-bit)
135    #[inline(always)]
136    pub fn half_word(self) -> &'a mut crate::W<REG> {
137        self.variant(DATATYPE::HalfWord)
138    }
139    ///Byte (8-bit)
140    #[inline(always)]
141    pub fn byte(self) -> &'a mut crate::W<REG> {
142        self.variant(DATATYPE::Byte)
143    }
144    ///Bit
145    #[inline(always)]
146    pub fn bit_(self) -> &'a mut crate::W<REG> {
147        self.variant(DATATYPE::Bit)
148    }
149}
150/**AES operating mode
151
152Value on reset: 0*/
153#[cfg_attr(feature = "defmt", derive(defmt::Format))]
154#[derive(Clone, Copy, Debug, PartialEq, Eq)]
155#[repr(u8)]
156pub enum MODE {
157    ///0: Mode 1: encryption
158    Mode1 = 0,
159    ///1: Mode 2: key derivation (or key preparation for ECB/CBC decryption)
160    Mode2 = 1,
161    ///2: Mode 3: decryption
162    Mode3 = 2,
163    ///3: Mode 4: key derivation then single decryption
164    Mode4 = 3,
165}
166impl From<MODE> for u8 {
167    #[inline(always)]
168    fn from(variant: MODE) -> Self {
169        variant as _
170    }
171}
172impl crate::FieldSpec for MODE {
173    type Ux = u8;
174}
175impl crate::IsEnum for MODE {}
176///Field `MODE` reader - AES operating mode
177pub type MODE_R = crate::FieldReader<MODE>;
178impl MODE_R {
179    ///Get enumerated values variant
180    #[inline(always)]
181    pub const fn variant(&self) -> MODE {
182        match self.bits {
183            0 => MODE::Mode1,
184            1 => MODE::Mode2,
185            2 => MODE::Mode3,
186            3 => MODE::Mode4,
187            _ => unreachable!(),
188        }
189    }
190    ///Mode 1: encryption
191    #[inline(always)]
192    pub fn is_mode1(&self) -> bool {
193        *self == MODE::Mode1
194    }
195    ///Mode 2: key derivation (or key preparation for ECB/CBC decryption)
196    #[inline(always)]
197    pub fn is_mode2(&self) -> bool {
198        *self == MODE::Mode2
199    }
200    ///Mode 3: decryption
201    #[inline(always)]
202    pub fn is_mode3(&self) -> bool {
203        *self == MODE::Mode3
204    }
205    ///Mode 4: key derivation then single decryption
206    #[inline(always)]
207    pub fn is_mode4(&self) -> bool {
208        *self == MODE::Mode4
209    }
210}
211///Field `MODE` writer - AES operating mode
212pub type MODE_W<'a, REG> = crate::FieldWriter<'a, REG, 2, MODE, crate::Safe>;
213impl<'a, REG> MODE_W<'a, REG>
214where
215    REG: crate::Writable + crate::RegisterSpec,
216    REG::Ux: From<u8>,
217{
218    ///Mode 1: encryption
219    #[inline(always)]
220    pub fn mode1(self) -> &'a mut crate::W<REG> {
221        self.variant(MODE::Mode1)
222    }
223    ///Mode 2: key derivation (or key preparation for ECB/CBC decryption)
224    #[inline(always)]
225    pub fn mode2(self) -> &'a mut crate::W<REG> {
226        self.variant(MODE::Mode2)
227    }
228    ///Mode 3: decryption
229    #[inline(always)]
230    pub fn mode3(self) -> &'a mut crate::W<REG> {
231        self.variant(MODE::Mode3)
232    }
233    ///Mode 4: key derivation then single decryption
234    #[inline(always)]
235    pub fn mode4(self) -> &'a mut crate::W<REG> {
236        self.variant(MODE::Mode4)
237    }
238}
239/**AES chaining mode
240
241Value on reset: 0*/
242#[cfg_attr(feature = "defmt", derive(defmt::Format))]
243#[derive(Clone, Copy, Debug, PartialEq, Eq)]
244#[repr(u8)]
245pub enum CHMOD {
246    ///0: Electronic codebook (ECB) / Counter with CBC-MAC (CCM) if CHMOD2 is 1
247    Ecb = 0,
248    ///1: Cipher-block chaining (CBC)
249    Cbc = 1,
250    ///2: Counter mode (CTR)
251    Ctr = 2,
252    ///3: Galois counter mode (GCM) and Galois message authentication code (GMAC)
253    Gcm = 3,
254}
255impl From<CHMOD> for u8 {
256    #[inline(always)]
257    fn from(variant: CHMOD) -> Self {
258        variant as _
259    }
260}
261impl crate::FieldSpec for CHMOD {
262    type Ux = u8;
263}
264impl crate::IsEnum for CHMOD {}
265///Field `CHMOD` reader - AES chaining mode
266pub type CHMOD_R = crate::FieldReader<CHMOD>;
267impl CHMOD_R {
268    ///Get enumerated values variant
269    #[inline(always)]
270    pub const fn variant(&self) -> CHMOD {
271        match self.bits {
272            0 => CHMOD::Ecb,
273            1 => CHMOD::Cbc,
274            2 => CHMOD::Ctr,
275            3 => CHMOD::Gcm,
276            _ => unreachable!(),
277        }
278    }
279    ///Electronic codebook (ECB) / Counter with CBC-MAC (CCM) if CHMOD2 is 1
280    #[inline(always)]
281    pub fn is_ecb(&self) -> bool {
282        *self == CHMOD::Ecb
283    }
284    ///Cipher-block chaining (CBC)
285    #[inline(always)]
286    pub fn is_cbc(&self) -> bool {
287        *self == CHMOD::Cbc
288    }
289    ///Counter mode (CTR)
290    #[inline(always)]
291    pub fn is_ctr(&self) -> bool {
292        *self == CHMOD::Ctr
293    }
294    ///Galois counter mode (GCM) and Galois message authentication code (GMAC)
295    #[inline(always)]
296    pub fn is_gcm(&self) -> bool {
297        *self == CHMOD::Gcm
298    }
299}
300///Field `CHMOD` writer - AES chaining mode
301pub type CHMOD_W<'a, REG> = crate::FieldWriter<'a, REG, 2, CHMOD, crate::Safe>;
302impl<'a, REG> CHMOD_W<'a, REG>
303where
304    REG: crate::Writable + crate::RegisterSpec,
305    REG::Ux: From<u8>,
306{
307    ///Electronic codebook (ECB) / Counter with CBC-MAC (CCM) if CHMOD2 is 1
308    #[inline(always)]
309    pub fn ecb(self) -> &'a mut crate::W<REG> {
310        self.variant(CHMOD::Ecb)
311    }
312    ///Cipher-block chaining (CBC)
313    #[inline(always)]
314    pub fn cbc(self) -> &'a mut crate::W<REG> {
315        self.variant(CHMOD::Cbc)
316    }
317    ///Counter mode (CTR)
318    #[inline(always)]
319    pub fn ctr(self) -> &'a mut crate::W<REG> {
320        self.variant(CHMOD::Ctr)
321    }
322    ///Galois counter mode (GCM) and Galois message authentication code (GMAC)
323    #[inline(always)]
324    pub fn gcm(self) -> &'a mut crate::W<REG> {
325        self.variant(CHMOD::Gcm)
326    }
327}
328/**Enable DMA management of data input phase
329
330Value on reset: 0*/
331#[cfg_attr(feature = "defmt", derive(defmt::Format))]
332#[derive(Clone, Copy, Debug, PartialEq, Eq)]
333pub enum DMAINEN {
334    ///0: Disable DMA Input
335    Disabled = 0,
336    ///1: Enable DMA Input
337    Enabled = 1,
338}
339impl From<DMAINEN> for bool {
340    #[inline(always)]
341    fn from(variant: DMAINEN) -> Self {
342        variant as u8 != 0
343    }
344}
345///Field `DMAINEN` reader - Enable DMA management of data input phase
346pub type DMAINEN_R = crate::BitReader<DMAINEN>;
347impl DMAINEN_R {
348    ///Get enumerated values variant
349    #[inline(always)]
350    pub const fn variant(&self) -> DMAINEN {
351        match self.bits {
352            false => DMAINEN::Disabled,
353            true => DMAINEN::Enabled,
354        }
355    }
356    ///Disable DMA Input
357    #[inline(always)]
358    pub fn is_disabled(&self) -> bool {
359        *self == DMAINEN::Disabled
360    }
361    ///Enable DMA Input
362    #[inline(always)]
363    pub fn is_enabled(&self) -> bool {
364        *self == DMAINEN::Enabled
365    }
366}
367///Field `DMAINEN` writer - Enable DMA management of data input phase
368pub type DMAINEN_W<'a, REG> = crate::BitWriter<'a, REG, DMAINEN>;
369impl<'a, REG> DMAINEN_W<'a, REG>
370where
371    REG: crate::Writable + crate::RegisterSpec,
372{
373    ///Disable DMA Input
374    #[inline(always)]
375    pub fn disabled(self) -> &'a mut crate::W<REG> {
376        self.variant(DMAINEN::Disabled)
377    }
378    ///Enable DMA Input
379    #[inline(always)]
380    pub fn enabled(self) -> &'a mut crate::W<REG> {
381        self.variant(DMAINEN::Enabled)
382    }
383}
384/**Enable DMA management of data output phase
385
386Value on reset: 0*/
387#[cfg_attr(feature = "defmt", derive(defmt::Format))]
388#[derive(Clone, Copy, Debug, PartialEq, Eq)]
389pub enum DMAOUTEN {
390    ///0: Disable DMA Output
391    Disabled = 0,
392    ///1: Enabled DMA Output
393    Enabled = 1,
394}
395impl From<DMAOUTEN> for bool {
396    #[inline(always)]
397    fn from(variant: DMAOUTEN) -> Self {
398        variant as u8 != 0
399    }
400}
401///Field `DMAOUTEN` reader - Enable DMA management of data output phase
402pub type DMAOUTEN_R = crate::BitReader<DMAOUTEN>;
403impl DMAOUTEN_R {
404    ///Get enumerated values variant
405    #[inline(always)]
406    pub const fn variant(&self) -> DMAOUTEN {
407        match self.bits {
408            false => DMAOUTEN::Disabled,
409            true => DMAOUTEN::Enabled,
410        }
411    }
412    ///Disable DMA Output
413    #[inline(always)]
414    pub fn is_disabled(&self) -> bool {
415        *self == DMAOUTEN::Disabled
416    }
417    ///Enabled DMA Output
418    #[inline(always)]
419    pub fn is_enabled(&self) -> bool {
420        *self == DMAOUTEN::Enabled
421    }
422}
423///Field `DMAOUTEN` writer - Enable DMA management of data output phase
424pub type DMAOUTEN_W<'a, REG> = crate::BitWriter<'a, REG, DMAOUTEN>;
425impl<'a, REG> DMAOUTEN_W<'a, REG>
426where
427    REG: crate::Writable + crate::RegisterSpec,
428{
429    ///Disable DMA Output
430    #[inline(always)]
431    pub fn disabled(self) -> &'a mut crate::W<REG> {
432        self.variant(DMAOUTEN::Disabled)
433    }
434    ///Enabled DMA Output
435    #[inline(always)]
436    pub fn enabled(self) -> &'a mut crate::W<REG> {
437        self.variant(DMAOUTEN::Enabled)
438    }
439}
440/**GCMPH
441
442Value on reset: 0*/
443#[cfg_attr(feature = "defmt", derive(defmt::Format))]
444#[derive(Clone, Copy, Debug, PartialEq, Eq)]
445#[repr(u8)]
446pub enum GCMPH {
447    ///0: Init phase
448    Init = 0,
449    ///1: Header phase
450    Header = 1,
451    ///2: Payload phase
452    Payload = 2,
453    ///3: Final Phase
454    Final = 3,
455}
456impl From<GCMPH> for u8 {
457    #[inline(always)]
458    fn from(variant: GCMPH) -> Self {
459        variant as _
460    }
461}
462impl crate::FieldSpec for GCMPH {
463    type Ux = u8;
464}
465impl crate::IsEnum for GCMPH {}
466///Field `GCMPH` reader - GCMPH
467pub type GCMPH_R = crate::FieldReader<GCMPH>;
468impl GCMPH_R {
469    ///Get enumerated values variant
470    #[inline(always)]
471    pub const fn variant(&self) -> GCMPH {
472        match self.bits {
473            0 => GCMPH::Init,
474            1 => GCMPH::Header,
475            2 => GCMPH::Payload,
476            3 => GCMPH::Final,
477            _ => unreachable!(),
478        }
479    }
480    ///Init phase
481    #[inline(always)]
482    pub fn is_init(&self) -> bool {
483        *self == GCMPH::Init
484    }
485    ///Header phase
486    #[inline(always)]
487    pub fn is_header(&self) -> bool {
488        *self == GCMPH::Header
489    }
490    ///Payload phase
491    #[inline(always)]
492    pub fn is_payload(&self) -> bool {
493        *self == GCMPH::Payload
494    }
495    ///Final Phase
496    #[inline(always)]
497    pub fn is_final(&self) -> bool {
498        *self == GCMPH::Final
499    }
500}
501///Field `GCMPH` writer - GCMPH
502pub type GCMPH_W<'a, REG> = crate::FieldWriter<'a, REG, 2, GCMPH, crate::Safe>;
503impl<'a, REG> GCMPH_W<'a, REG>
504where
505    REG: crate::Writable + crate::RegisterSpec,
506    REG::Ux: From<u8>,
507{
508    ///Init phase
509    #[inline(always)]
510    pub fn init(self) -> &'a mut crate::W<REG> {
511        self.variant(GCMPH::Init)
512    }
513    ///Header phase
514    #[inline(always)]
515    pub fn header(self) -> &'a mut crate::W<REG> {
516        self.variant(GCMPH::Header)
517    }
518    ///Payload phase
519    #[inline(always)]
520    pub fn payload(self) -> &'a mut crate::W<REG> {
521        self.variant(GCMPH::Payload)
522    }
523    ///Final Phase
524    #[inline(always)]
525    pub fn final_(self) -> &'a mut crate::W<REG> {
526        self.variant(GCMPH::Final)
527    }
528}
529/**CHMOD_2
530
531Value on reset: 0*/
532#[cfg_attr(feature = "defmt", derive(defmt::Format))]
533#[derive(Clone, Copy, Debug, PartialEq, Eq)]
534pub enum CHMOD_2 {
535    ///0: Mode as per CHMOD (ECB, CBC, CTR, GCM)
536    Chmod = 0,
537    ///1: Counter with CBC-MAC (CCM) - CHMOD must be 0 (ECB)
538    Ccm = 1,
539}
540impl From<CHMOD_2> for bool {
541    #[inline(always)]
542    fn from(variant: CHMOD_2) -> Self {
543        variant as u8 != 0
544    }
545}
546///Field `CHMOD_2` reader - CHMOD_2
547pub type CHMOD_2_R = crate::BitReader<CHMOD_2>;
548impl CHMOD_2_R {
549    ///Get enumerated values variant
550    #[inline(always)]
551    pub const fn variant(&self) -> CHMOD_2 {
552        match self.bits {
553            false => CHMOD_2::Chmod,
554            true => CHMOD_2::Ccm,
555        }
556    }
557    ///Mode as per CHMOD (ECB, CBC, CTR, GCM)
558    #[inline(always)]
559    pub fn is_chmod(&self) -> bool {
560        *self == CHMOD_2::Chmod
561    }
562    ///Counter with CBC-MAC (CCM) - CHMOD must be 0 (ECB)
563    #[inline(always)]
564    pub fn is_ccm(&self) -> bool {
565        *self == CHMOD_2::Ccm
566    }
567}
568///Field `CHMOD_2` writer - CHMOD_2
569pub type CHMOD_2_W<'a, REG> = crate::BitWriter<'a, REG, CHMOD_2>;
570impl<'a, REG> CHMOD_2_W<'a, REG>
571where
572    REG: crate::Writable + crate::RegisterSpec,
573{
574    ///Mode as per CHMOD (ECB, CBC, CTR, GCM)
575    #[inline(always)]
576    pub fn chmod(self) -> &'a mut crate::W<REG> {
577        self.variant(CHMOD_2::Chmod)
578    }
579    ///Counter with CBC-MAC (CCM) - CHMOD must be 0 (ECB)
580    #[inline(always)]
581    pub fn ccm(self) -> &'a mut crate::W<REG> {
582        self.variant(CHMOD_2::Ccm)
583    }
584}
585/**KEYSIZE
586
587Value on reset: 0*/
588#[cfg_attr(feature = "defmt", derive(defmt::Format))]
589#[derive(Clone, Copy, Debug, PartialEq, Eq)]
590pub enum KEYSIZE {
591    ///0: 128
592    Aes128 = 0,
593    ///1: 256
594    Aes256 = 1,
595}
596impl From<KEYSIZE> for bool {
597    #[inline(always)]
598    fn from(variant: KEYSIZE) -> Self {
599        variant as u8 != 0
600    }
601}
602///Field `KEYSIZE` reader - KEYSIZE
603pub type KEYSIZE_R = crate::BitReader<KEYSIZE>;
604impl KEYSIZE_R {
605    ///Get enumerated values variant
606    #[inline(always)]
607    pub const fn variant(&self) -> KEYSIZE {
608        match self.bits {
609            false => KEYSIZE::Aes128,
610            true => KEYSIZE::Aes256,
611        }
612    }
613    ///128
614    #[inline(always)]
615    pub fn is_aes128(&self) -> bool {
616        *self == KEYSIZE::Aes128
617    }
618    ///256
619    #[inline(always)]
620    pub fn is_aes256(&self) -> bool {
621        *self == KEYSIZE::Aes256
622    }
623}
624///Field `KEYSIZE` writer - KEYSIZE
625pub type KEYSIZE_W<'a, REG> = crate::BitWriter<'a, REG, KEYSIZE>;
626impl<'a, REG> KEYSIZE_W<'a, REG>
627where
628    REG: crate::Writable + crate::RegisterSpec,
629{
630    ///128
631    #[inline(always)]
632    pub fn aes128(self) -> &'a mut crate::W<REG> {
633        self.variant(KEYSIZE::Aes128)
634    }
635    ///256
636    #[inline(always)]
637    pub fn aes256(self) -> &'a mut crate::W<REG> {
638        self.variant(KEYSIZE::Aes256)
639    }
640}
641///Field `NPBLB` reader - NPBLB
642pub type NPBLB_R = crate::FieldReader;
643///Field `NPBLB` writer - NPBLB
644pub type NPBLB_W<'a, REG> = crate::FieldWriter<'a, REG, 4, u8, crate::Safe>;
645/**KMOD
646
647Value on reset: 0*/
648#[cfg_attr(feature = "defmt", derive(defmt::Format))]
649#[derive(Clone, Copy, Debug, PartialEq, Eq)]
650#[repr(u8)]
651pub enum KMOD {
652    ///0: Normal key mode. Key registers are freely usable
653    NormalKey = 0,
654    ///2: Shared key mode. If shared key mode is properly initialized in SAES peripheral, the AES peripheral automatically loads its key registers with the data stored in the SAES key registers. The key value is available in AES key registers when BUSY bit is cleared and KEYVALID is set in the AES_SR register. Key error flag KEIF is set otherwise in the AES_ISR register
655    SharedKey = 2,
656}
657impl From<KMOD> for u8 {
658    #[inline(always)]
659    fn from(variant: KMOD) -> Self {
660        variant as _
661    }
662}
663impl crate::FieldSpec for KMOD {
664    type Ux = u8;
665}
666impl crate::IsEnum for KMOD {}
667///Field `KMOD` reader - KMOD
668pub type KMOD_R = crate::FieldReader<KMOD>;
669impl KMOD_R {
670    ///Get enumerated values variant
671    #[inline(always)]
672    pub const fn variant(&self) -> Option<KMOD> {
673        match self.bits {
674            0 => Some(KMOD::NormalKey),
675            2 => Some(KMOD::SharedKey),
676            _ => None,
677        }
678    }
679    ///Normal key mode. Key registers are freely usable
680    #[inline(always)]
681    pub fn is_normal_key(&self) -> bool {
682        *self == KMOD::NormalKey
683    }
684    ///Shared key mode. If shared key mode is properly initialized in SAES peripheral, the AES peripheral automatically loads its key registers with the data stored in the SAES key registers. The key value is available in AES key registers when BUSY bit is cleared and KEYVALID is set in the AES_SR register. Key error flag KEIF is set otherwise in the AES_ISR register
685    #[inline(always)]
686    pub fn is_shared_key(&self) -> bool {
687        *self == KMOD::SharedKey
688    }
689}
690///Field `KMOD` writer - KMOD
691pub type KMOD_W<'a, REG> = crate::FieldWriter<'a, REG, 2, KMOD>;
692impl<'a, REG> KMOD_W<'a, REG>
693where
694    REG: crate::Writable + crate::RegisterSpec,
695    REG::Ux: From<u8>,
696{
697    ///Normal key mode. Key registers are freely usable
698    #[inline(always)]
699    pub fn normal_key(self) -> &'a mut crate::W<REG> {
700        self.variant(KMOD::NormalKey)
701    }
702    ///Shared key mode. If shared key mode is properly initialized in SAES peripheral, the AES peripheral automatically loads its key registers with the data stored in the SAES key registers. The key value is available in AES key registers when BUSY bit is cleared and KEYVALID is set in the AES_SR register. Key error flag KEIF is set otherwise in the AES_ISR register
703    #[inline(always)]
704    pub fn shared_key(self) -> &'a mut crate::W<REG> {
705        self.variant(KMOD::SharedKey)
706    }
707}
708///Field `IPRST` reader - IPRST
709pub type IPRST_R = crate::BitReader;
710///Field `IPRST` writer - IPRST
711pub type IPRST_W<'a, REG> = crate::BitWriter<'a, REG>;
712impl R {
713    ///Bit 0 - AES enable
714    #[inline(always)]
715    pub fn en(&self) -> EN_R {
716        EN_R::new((self.bits & 1) != 0)
717    }
718    ///Bits 1:2 - Data type selection (for data in and data out to/from the cryptographic block)
719    #[inline(always)]
720    pub fn datatype(&self) -> DATATYPE_R {
721        DATATYPE_R::new(((self.bits >> 1) & 3) as u8)
722    }
723    ///Bits 3:4 - AES operating mode
724    #[inline(always)]
725    pub fn mode(&self) -> MODE_R {
726        MODE_R::new(((self.bits >> 3) & 3) as u8)
727    }
728    ///Bits 5:6 - AES chaining mode
729    #[inline(always)]
730    pub fn chmod(&self) -> CHMOD_R {
731        CHMOD_R::new(((self.bits >> 5) & 3) as u8)
732    }
733    ///Bit 11 - Enable DMA management of data input phase
734    #[inline(always)]
735    pub fn dmainen(&self) -> DMAINEN_R {
736        DMAINEN_R::new(((self.bits >> 11) & 1) != 0)
737    }
738    ///Bit 12 - Enable DMA management of data output phase
739    #[inline(always)]
740    pub fn dmaouten(&self) -> DMAOUTEN_R {
741        DMAOUTEN_R::new(((self.bits >> 12) & 1) != 0)
742    }
743    ///Bits 13:14 - GCMPH
744    #[inline(always)]
745    pub fn gcmph(&self) -> GCMPH_R {
746        GCMPH_R::new(((self.bits >> 13) & 3) as u8)
747    }
748    ///Bit 16 - CHMOD_2
749    #[inline(always)]
750    pub fn chmod_2(&self) -> CHMOD_2_R {
751        CHMOD_2_R::new(((self.bits >> 16) & 1) != 0)
752    }
753    ///Bit 18 - KEYSIZE
754    #[inline(always)]
755    pub fn keysize(&self) -> KEYSIZE_R {
756        KEYSIZE_R::new(((self.bits >> 18) & 1) != 0)
757    }
758    ///Bits 20:23 - NPBLB
759    #[inline(always)]
760    pub fn npblb(&self) -> NPBLB_R {
761        NPBLB_R::new(((self.bits >> 20) & 0x0f) as u8)
762    }
763    ///Bits 24:25 - KMOD
764    #[inline(always)]
765    pub fn kmod(&self) -> KMOD_R {
766        KMOD_R::new(((self.bits >> 24) & 3) as u8)
767    }
768    ///Bit 31 - IPRST
769    #[inline(always)]
770    pub fn iprst(&self) -> IPRST_R {
771        IPRST_R::new(((self.bits >> 31) & 1) != 0)
772    }
773}
774impl core::fmt::Debug for R {
775    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
776        f.debug_struct("CR")
777            .field("iprst", &self.iprst())
778            .field("kmod", &self.kmod())
779            .field("npblb", &self.npblb())
780            .field("keysize", &self.keysize())
781            .field("chmod_2", &self.chmod_2())
782            .field("gcmph", &self.gcmph())
783            .field("dmaouten", &self.dmaouten())
784            .field("dmainen", &self.dmainen())
785            .field("chmod", &self.chmod())
786            .field("mode", &self.mode())
787            .field("datatype", &self.datatype())
788            .field("en", &self.en())
789            .finish()
790    }
791}
792impl W {
793    ///Bit 0 - AES enable
794    #[inline(always)]
795    pub fn en(&mut self) -> EN_W<CRrs> {
796        EN_W::new(self, 0)
797    }
798    ///Bits 1:2 - Data type selection (for data in and data out to/from the cryptographic block)
799    #[inline(always)]
800    pub fn datatype(&mut self) -> DATATYPE_W<CRrs> {
801        DATATYPE_W::new(self, 1)
802    }
803    ///Bits 3:4 - AES operating mode
804    #[inline(always)]
805    pub fn mode(&mut self) -> MODE_W<CRrs> {
806        MODE_W::new(self, 3)
807    }
808    ///Bits 5:6 - AES chaining mode
809    #[inline(always)]
810    pub fn chmod(&mut self) -> CHMOD_W<CRrs> {
811        CHMOD_W::new(self, 5)
812    }
813    ///Bit 11 - Enable DMA management of data input phase
814    #[inline(always)]
815    pub fn dmainen(&mut self) -> DMAINEN_W<CRrs> {
816        DMAINEN_W::new(self, 11)
817    }
818    ///Bit 12 - Enable DMA management of data output phase
819    #[inline(always)]
820    pub fn dmaouten(&mut self) -> DMAOUTEN_W<CRrs> {
821        DMAOUTEN_W::new(self, 12)
822    }
823    ///Bits 13:14 - GCMPH
824    #[inline(always)]
825    pub fn gcmph(&mut self) -> GCMPH_W<CRrs> {
826        GCMPH_W::new(self, 13)
827    }
828    ///Bit 16 - CHMOD_2
829    #[inline(always)]
830    pub fn chmod_2(&mut self) -> CHMOD_2_W<CRrs> {
831        CHMOD_2_W::new(self, 16)
832    }
833    ///Bit 18 - KEYSIZE
834    #[inline(always)]
835    pub fn keysize(&mut self) -> KEYSIZE_W<CRrs> {
836        KEYSIZE_W::new(self, 18)
837    }
838    ///Bits 20:23 - NPBLB
839    #[inline(always)]
840    pub fn npblb(&mut self) -> NPBLB_W<CRrs> {
841        NPBLB_W::new(self, 20)
842    }
843    ///Bits 24:25 - KMOD
844    #[inline(always)]
845    pub fn kmod(&mut self) -> KMOD_W<CRrs> {
846        KMOD_W::new(self, 24)
847    }
848    ///Bit 31 - IPRST
849    #[inline(always)]
850    pub fn iprst(&mut self) -> IPRST_W<CRrs> {
851        IPRST_W::new(self, 31)
852    }
853}
854/**control register
855
856You can [`read`](crate::Reg::read) this register and get [`cr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
857
858See register [structure](https://stm32-rs.github.io/stm32-rs/STM32U545.html#AES:CR)*/
859pub struct CRrs;
860impl crate::RegisterSpec for CRrs {
861    type Ux = u32;
862}
863///`read()` method returns [`cr::R`](R) reader structure
864impl crate::Readable for CRrs {}
865///`write(|w| ..)` method takes [`cr::W`](W) writer structure
866impl crate::Writable for CRrs {
867    type Safety = crate::Unsafe;
868}
869///`reset()` method sets CR to value 0
870impl crate::Resettable for CRrs {}
stm32u5/stm32u545/aes/cr.rs

stm32u5/stm32u545/aes/
cr.rs
