stm32u5/stm32u545/
aes.rs

1#[repr(C)]
2#[derive(Debug)]
3///Register block
4pub struct RegisterBlock {
5    cr: CR,
6    sr: SR,
7    dinr: DINR,
8    doutr: DOUTR,
9    keyr0: KEYR0,
10    keyr1: KEYR1,
11    keyr2: KEYR2,
12    keyr3: KEYR3,
13    ivr0: IVR0,
14    ivr1: IVR1,
15    ivr2: IVR2,
16    ivr3: IVR3,
17    keyr4: KEYR4,
18    keyr5: KEYR5,
19    keyr6: KEYR6,
20    keyr7: KEYR7,
21    susp0r: SUSP0R,
22    susp1r: SUSP1R,
23    susp2r: SUSP2R,
24    susp3r: SUSP3R,
25    susp4r: SUSP4R,
26    susp5r: SUSP5R,
27    susp6r: SUSP6R,
28    susp7r: SUSP7R,
29    _reserved24: [u8; 0x02a0],
30    ier: IER,
31    isr: ISR,
32    icr: ICR,
33}
34impl RegisterBlock {
35    ///0x00 - control register
36    #[inline(always)]
37    pub const fn cr(&self) -> &CR {
38        &self.cr
39    }
40    ///0x04 - status register
41    #[inline(always)]
42    pub const fn sr(&self) -> &SR {
43        &self.sr
44    }
45    ///0x08 - data input register
46    #[inline(always)]
47    pub const fn dinr(&self) -> &DINR {
48        &self.dinr
49    }
50    ///0x0c - data output register
51    #[inline(always)]
52    pub const fn doutr(&self) -> &DOUTR {
53        &self.doutr
54    }
55    ///0x10 - key register 0
56    #[inline(always)]
57    pub const fn keyr0(&self) -> &KEYR0 {
58        &self.keyr0
59    }
60    ///0x14 - key register 1
61    #[inline(always)]
62    pub const fn keyr1(&self) -> &KEYR1 {
63        &self.keyr1
64    }
65    ///0x18 - key register 2
66    #[inline(always)]
67    pub const fn keyr2(&self) -> &KEYR2 {
68        &self.keyr2
69    }
70    ///0x1c - key register 3
71    #[inline(always)]
72    pub const fn keyr3(&self) -> &KEYR3 {
73        &self.keyr3
74    }
75    ///0x20 - initialization vector register 0
76    #[inline(always)]
77    pub const fn ivr0(&self) -> &IVR0 {
78        &self.ivr0
79    }
80    ///0x24 - initialization vector register 1
81    #[inline(always)]
82    pub const fn ivr1(&self) -> &IVR1 {
83        &self.ivr1
84    }
85    ///0x28 - initialization vector register 2
86    #[inline(always)]
87    pub const fn ivr2(&self) -> &IVR2 {
88        &self.ivr2
89    }
90    ///0x2c - initialization vector register 3
91    #[inline(always)]
92    pub const fn ivr3(&self) -> &IVR3 {
93        &self.ivr3
94    }
95    ///0x30 - key register 4
96    #[inline(always)]
97    pub const fn keyr4(&self) -> &KEYR4 {
98        &self.keyr4
99    }
100    ///0x34 - key register 5
101    #[inline(always)]
102    pub const fn keyr5(&self) -> &KEYR5 {
103        &self.keyr5
104    }
105    ///0x38 - key register 6
106    #[inline(always)]
107    pub const fn keyr6(&self) -> &KEYR6 {
108        &self.keyr6
109    }
110    ///0x3c - key register 7
111    #[inline(always)]
112    pub const fn keyr7(&self) -> &KEYR7 {
113        &self.keyr7
114    }
115    ///0x40 - suspend registers
116    #[inline(always)]
117    pub const fn susp0r(&self) -> &SUSP0R {
118        &self.susp0r
119    }
120    ///0x44 - suspend registers
121    #[inline(always)]
122    pub const fn susp1r(&self) -> &SUSP1R {
123        &self.susp1r
124    }
125    ///0x48 - suspend registers
126    #[inline(always)]
127    pub const fn susp2r(&self) -> &SUSP2R {
128        &self.susp2r
129    }
130    ///0x4c - suspend registers
131    #[inline(always)]
132    pub const fn susp3r(&self) -> &SUSP3R {
133        &self.susp3r
134    }
135    ///0x50 - suspend registers
136    #[inline(always)]
137    pub const fn susp4r(&self) -> &SUSP4R {
138        &self.susp4r
139    }
140    ///0x54 - suspend registers
141    #[inline(always)]
142    pub const fn susp5r(&self) -> &SUSP5R {
143        &self.susp5r
144    }
145    ///0x58 - suspend registers
146    #[inline(always)]
147    pub const fn susp6r(&self) -> &SUSP6R {
148        &self.susp6r
149    }
150    ///0x5c - suspend registers
151    #[inline(always)]
152    pub const fn susp7r(&self) -> &SUSP7R {
153        &self.susp7r
154    }
155    ///0x300 - interrupt enable register
156    #[inline(always)]
157    pub const fn ier(&self) -> &IER {
158        &self.ier
159    }
160    ///0x304 - interrupt status register
161    #[inline(always)]
162    pub const fn isr(&self) -> &ISR {
163        &self.isr
164    }
165    ///0x308 - interrupt clear register
166    #[inline(always)]
167    pub const fn icr(&self) -> &ICR {
168        &self.icr
169    }
170}
171/**CR (rw) register accessor: control register
172
173You can [`read`](crate::Reg::read) this register and get [`cr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
174
175See register [structure](https://stm32-rs.github.io/stm32-rs/STM32U545.html#AES:CR)
176
177For information about available fields see [`mod@cr`] module*/
178pub type CR = crate::Reg<cr::CRrs>;
179///control register
180pub mod cr;
181/**SR (r) register accessor: status register
182
183You can [`read`](crate::Reg::read) this register and get [`sr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
184
185See register [structure](https://stm32-rs.github.io/stm32-rs/STM32U545.html#AES:SR)
186
187For information about available fields see [`mod@sr`] module*/
188pub type SR = crate::Reg<sr::SRrs>;
189///status register
190pub mod sr;
191/**DINR (w) register accessor: data input register
192
193You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dinr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
194
195See register [structure](https://stm32-rs.github.io/stm32-rs/STM32U545.html#AES:DINR)
196
197For information about available fields see [`mod@dinr`] module*/
198pub type DINR = crate::Reg<dinr::DINRrs>;
199///data input register
200pub mod dinr;
201/**DOUTR (r) register accessor: data output register
202
203You can [`read`](crate::Reg::read) this register and get [`doutr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
204
205See register [structure](https://stm32-rs.github.io/stm32-rs/STM32U545.html#AES:DOUTR)
206
207For information about available fields see [`mod@doutr`] module*/
208pub type DOUTR = crate::Reg<doutr::DOUTRrs>;
209///data output register
210pub mod doutr;
211/**KEYR0 (w) register accessor: key register 0
212
213You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`keyr0::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
214
215See register [structure](https://stm32-rs.github.io/stm32-rs/STM32U545.html#AES:KEYR0)
216
217For information about available fields see [`mod@keyr0`] module*/
218pub type KEYR0 = crate::Reg<keyr0::KEYR0rs>;
219///key register 0
220pub mod keyr0;
221/**KEYR1 (w) register accessor: key register 1
222
223You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`keyr1::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
224
225See register [structure](https://stm32-rs.github.io/stm32-rs/STM32U545.html#AES:KEYR1)
226
227For information about available fields see [`mod@keyr1`] module*/
228pub type KEYR1 = crate::Reg<keyr1::KEYR1rs>;
229///key register 1
230pub mod keyr1;
231/**KEYR2 (w) register accessor: key register 2
232
233You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`keyr2::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
234
235See register [structure](https://stm32-rs.github.io/stm32-rs/STM32U545.html#AES:KEYR2)
236
237For information about available fields see [`mod@keyr2`] module*/
238pub type KEYR2 = crate::Reg<keyr2::KEYR2rs>;
239///key register 2
240pub mod keyr2;
241/**KEYR3 (w) register accessor: key register 3
242
243You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`keyr3::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
244
245See register [structure](https://stm32-rs.github.io/stm32-rs/STM32U545.html#AES:KEYR3)
246
247For information about available fields see [`mod@keyr3`] module*/
248pub type KEYR3 = crate::Reg<keyr3::KEYR3rs>;
249///key register 3
250pub mod keyr3;
251/**IVR0 (rw) register accessor: initialization vector register 0
252
253You can [`read`](crate::Reg::read) this register and get [`ivr0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ivr0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
254
255See register [structure](https://stm32-rs.github.io/stm32-rs/STM32U545.html#AES:IVR0)
256
257For information about available fields see [`mod@ivr0`] module*/
258pub type IVR0 = crate::Reg<ivr0::IVR0rs>;
259///initialization vector register 0
260pub mod ivr0;
261/**IVR1 (rw) register accessor: initialization vector register 1
262
263You can [`read`](crate::Reg::read) this register and get [`ivr1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ivr1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
264
265See register [structure](https://stm32-rs.github.io/stm32-rs/STM32U545.html#AES:IVR1)
266
267For information about available fields see [`mod@ivr1`] module*/
268pub type IVR1 = crate::Reg<ivr1::IVR1rs>;
269///initialization vector register 1
270pub mod ivr1;
271/**IVR2 (rw) register accessor: initialization vector register 2
272
273You can [`read`](crate::Reg::read) this register and get [`ivr2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ivr2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
274
275See register [structure](https://stm32-rs.github.io/stm32-rs/STM32U545.html#AES:IVR2)
276
277For information about available fields see [`mod@ivr2`] module*/
278pub type IVR2 = crate::Reg<ivr2::IVR2rs>;
279///initialization vector register 2
280pub mod ivr2;
281/**IVR3 (rw) register accessor: initialization vector register 3
282
283You can [`read`](crate::Reg::read) this register and get [`ivr3::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ivr3::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
284
285See register [structure](https://stm32-rs.github.io/stm32-rs/STM32U545.html#AES:IVR3)
286
287For information about available fields see [`mod@ivr3`] module*/
288pub type IVR3 = crate::Reg<ivr3::IVR3rs>;
289///initialization vector register 3
290pub mod ivr3;
291/**KEYR4 (w) register accessor: key register 4
292
293You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`keyr4::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
294
295See register [structure](https://stm32-rs.github.io/stm32-rs/STM32U545.html#AES:KEYR4)
296
297For information about available fields see [`mod@keyr4`] module*/
298pub type KEYR4 = crate::Reg<keyr4::KEYR4rs>;
299///key register 4
300pub mod keyr4;
301/**KEYR5 (w) register accessor: key register 5
302
303You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`keyr5::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
304
305See register [structure](https://stm32-rs.github.io/stm32-rs/STM32U545.html#AES:KEYR5)
306
307For information about available fields see [`mod@keyr5`] module*/
308pub type KEYR5 = crate::Reg<keyr5::KEYR5rs>;
309///key register 5
310pub mod keyr5;
311/**KEYR6 (w) register accessor: key register 6
312
313You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`keyr6::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
314
315See register [structure](https://stm32-rs.github.io/stm32-rs/STM32U545.html#AES:KEYR6)
316
317For information about available fields see [`mod@keyr6`] module*/
318pub type KEYR6 = crate::Reg<keyr6::KEYR6rs>;
319///key register 6
320pub mod keyr6;
321/**KEYR7 (w) register accessor: key register 7
322
323You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`keyr7::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
324
325See register [structure](https://stm32-rs.github.io/stm32-rs/STM32U545.html#AES:KEYR7)
326
327For information about available fields see [`mod@keyr7`] module*/
328pub type KEYR7 = crate::Reg<keyr7::KEYR7rs>;
329///key register 7
330pub mod keyr7;
331/**SUSP0R (w) register accessor: suspend registers
332
333You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`susp0r::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
334
335See register [structure](https://stm32-rs.github.io/stm32-rs/STM32U545.html#AES:SUSP0R)
336
337For information about available fields see [`mod@susp0r`] module*/
338pub type SUSP0R = crate::Reg<susp0r::SUSP0Rrs>;
339///suspend registers
340pub mod susp0r;
341/**SUSP1R (w) register accessor: suspend registers
342
343You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`susp1r::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
344
345See register [structure](https://stm32-rs.github.io/stm32-rs/STM32U545.html#AES:SUSP1R)
346
347For information about available fields see [`mod@susp1r`] module*/
348pub type SUSP1R = crate::Reg<susp1r::SUSP1Rrs>;
349///suspend registers
350pub mod susp1r;
351/**SUSP2R (w) register accessor: suspend registers
352
353You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`susp2r::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
354
355See register [structure](https://stm32-rs.github.io/stm32-rs/STM32U545.html#AES:SUSP2R)
356
357For information about available fields see [`mod@susp2r`] module*/
358pub type SUSP2R = crate::Reg<susp2r::SUSP2Rrs>;
359///suspend registers
360pub mod susp2r;
361/**SUSP3R (w) register accessor: suspend registers
362
363You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`susp3r::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
364
365See register [structure](https://stm32-rs.github.io/stm32-rs/STM32U545.html#AES:SUSP3R)
366
367For information about available fields see [`mod@susp3r`] module*/
368pub type SUSP3R = crate::Reg<susp3r::SUSP3Rrs>;
369///suspend registers
370pub mod susp3r;
371/**SUSP4R (w) register accessor: suspend registers
372
373You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`susp4r::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
374
375See register [structure](https://stm32-rs.github.io/stm32-rs/STM32U545.html#AES:SUSP4R)
376
377For information about available fields see [`mod@susp4r`] module*/
378pub type SUSP4R = crate::Reg<susp4r::SUSP4Rrs>;
379///suspend registers
380pub mod susp4r;
381/**SUSP5R (w) register accessor: suspend registers
382
383You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`susp5r::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
384
385See register [structure](https://stm32-rs.github.io/stm32-rs/STM32U545.html#AES:SUSP5R)
386
387For information about available fields see [`mod@susp5r`] module*/
388pub type SUSP5R = crate::Reg<susp5r::SUSP5Rrs>;
389///suspend registers
390pub mod susp5r;
391/**SUSP6R (w) register accessor: suspend registers
392
393You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`susp6r::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
394
395See register [structure](https://stm32-rs.github.io/stm32-rs/STM32U545.html#AES:SUSP6R)
396
397For information about available fields see [`mod@susp6r`] module*/
398pub type SUSP6R = crate::Reg<susp6r::SUSP6Rrs>;
399///suspend registers
400pub mod susp6r;
401/**SUSP7R (w) register accessor: suspend registers
402
403You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`susp7r::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
404
405See register [structure](https://stm32-rs.github.io/stm32-rs/STM32U545.html#AES:SUSP7R)
406
407For information about available fields see [`mod@susp7r`] module*/
408pub type SUSP7R = crate::Reg<susp7r::SUSP7Rrs>;
409///suspend registers
410pub mod susp7r;
411/**IER (rw) register accessor: interrupt enable register
412
413You can [`read`](crate::Reg::read) this register and get [`ier::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ier::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
414
415See register [structure](https://stm32-rs.github.io/stm32-rs/STM32U545.html#AES:IER)
416
417For information about available fields see [`mod@ier`] module*/
418pub type IER = crate::Reg<ier::IERrs>;
419///interrupt enable register
420pub mod ier;
421/**ISR (r) register accessor: interrupt status register
422
423You can [`read`](crate::Reg::read) this register and get [`isr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
424
425See register [structure](https://stm32-rs.github.io/stm32-rs/STM32U545.html#AES:ISR)
426
427For information about available fields see [`mod@isr`] module*/
428pub type ISR = crate::Reg<isr::ISRrs>;
429///interrupt status register
430pub mod isr;
431/**ICR (w) register accessor: interrupt clear register
432
433You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`icr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).
434
435See register [structure](https://stm32-rs.github.io/stm32-rs/STM32U545.html#AES:ICR)
436
437For information about available fields see [`mod@icr`] module*/
438pub type ICR = crate::Reg<icr::ICRrs>;
439///interrupt clear register
440pub mod icr;
stm32u5/stm32u545/aes.rs

stm32u5/stm32u545/
aes.rs
