Expand description
Reset and clock control
Modules§
- AHB1ENR
- AHB1 peripheral clock enable register
- AHB1RSTR
- AHB1 peripheral reset register
- AHB1SMENR
- AHB1 peripheral clocks enable in Sleep and Stop modes register
- AHB2ENR
- AHB2 peripheral clock enable register
- AHB2RSTR
- AHB2 peripheral reset register
- AHB2SMENR
- AHB2 peripheral clocks enable in Sleep and Stop modes register
- AHB3ENR
- AHB3 peripheral clock enable register
- AHB3RSTR
- AHB3 peripheral reset register
- AHB3SMENR
- AHB3 peripheral clocks enable in Sleep and Stop modes register
- APB1EN
R1 - APB1ENR1
- APB1EN
R2 - APB1 peripheral clock enable register 2
- APB1RST
R1 - APB1 peripheral reset register 1
- APB1RST
R2 - APB1 peripheral reset register 2
- APB1SMEN
R1 - APB1SMENR1
- APB1SMEN
R2 - APB1 peripheral clocks enable in Sleep and Stop modes register 2
- APB2ENR
- APB2ENR
- APB2RSTR
- APB2 peripheral reset register
- APB2SMENR
- APB2SMENR
- BDCR
- BDCR
- CCIPR
- CCIPR
- CFGR
- Clock configuration register
- CICR
- Clock interrupt clear register
- CIER
- Clock interrupt enable register
- CIFR
- Clock interrupt flag register
- CR
- Clock control register
- CRRCR
- Clock recovery RC register
- CSR
- CSR
- ICSCR
- Internal clock sources calibration register
- PLLCFGR
- PLL configuration register
- PLLSA
I1CFGR - PLLSAI1 configuration register
- RCC
- Access functions for the RCC peripheral instance
Structs§
Constants§
- RCC
- Raw pointer to RCC