Expand description
Reset and clock control
Modules§
- AHBENR
- AHB Peripheral Clock enable register (RCC_AHBENR)
- AHBRSTR
- AHB peripheral reset register
- APB1ENR
- APB1 peripheral clock enable register (RCC_APB1ENR)
- APB1RSTR
- APB1 peripheral reset register (RCC_APB1RSTR)
- APB2ENR
- APB2 peripheral clock enable register (RCC_APB2ENR)
- APB2RSTR
- APB2 peripheral reset register (RCC_APB2RSTR)
- BDCR
- Backup domain control register (RCC_BDCR)
- CFGR
- Clock configuration register (RCC_CFGR)
- CFGR2
- Clock configuration register 2
- CFGR3
- Clock configuration register 3
- CIR
- Clock interrupt register (RCC_CIR)
- CR
- Clock control register
- CSR
- Control/status register (RCC_CSR)
- RCC
- Access functions for the RCC peripheral instance
Structs§
Constants§
- RCC
- Raw pointer to RCC