stm32ral/stm32l4/instances/
tim6.rs

1#![allow(non_snake_case, non_upper_case_globals)]
2#![allow(non_camel_case_types)]
3//! Basic-timers
4//!
5//! Used by: stm32l412, stm32l4r5, stm32l4r9, stm32l4x1, stm32l4x2, stm32l4x3, stm32l4x5, stm32l4x6
6
7#[cfg(not(feature = "nosync"))]
8pub use crate::stm32l4::peripherals::tim6::Instance;
9pub use crate::stm32l4::peripherals::tim6::{RegisterBlock, ResetValues};
10pub use crate::stm32l4::peripherals::tim6::{ARR, CNT, CR1, CR2, DIER, EGR, PSC, SR};
11
12/// Access functions for the TIM6 peripheral instance
13pub mod TIM6 {
14    use super::ResetValues;
15
16    #[cfg(not(feature = "nosync"))]
17    use super::Instance;
18
19    #[cfg(not(feature = "nosync"))]
20    const INSTANCE: Instance = Instance {
21        addr: 0x40001000,
22        _marker: ::core::marker::PhantomData,
23    };
24
25    /// Reset values for each field in TIM6
26    pub const reset: ResetValues = ResetValues {
27        CR1: 0x00000000,
28        CR2: 0x00000000,
29        DIER: 0x00000000,
30        SR: 0x00000000,
31        EGR: 0x00000000,
32        CNT: 0x00000000,
33        PSC: 0x00000000,
34        ARR: 0x00000000,
35    };
36
37    #[cfg(not(feature = "nosync"))]
38    #[allow(renamed_and_removed_lints)]
39    #[allow(private_no_mangle_statics)]
40    #[no_mangle]
41    static mut TIM6_TAKEN: bool = false;
42
43    /// Safe access to TIM6
44    ///
45    /// This function returns `Some(Instance)` if this instance is not
46    /// currently taken, and `None` if it is. This ensures that if you
47    /// do get `Some(Instance)`, you are ensured unique access to
48    /// the peripheral and there cannot be data races (unless other
49    /// code uses `unsafe`, of course). You can then pass the
50    /// `Instance` around to other functions as required. When you're
51    /// done with it, you can call `release(instance)` to return it.
52    ///
53    /// `Instance` itself dereferences to a `RegisterBlock`, which
54    /// provides access to the peripheral's registers.
55    #[cfg(not(feature = "nosync"))]
56    #[inline]
57    pub fn take() -> Option<Instance> {
58        external_cortex_m::interrupt::free(|_| unsafe {
59            if TIM6_TAKEN {
60                None
61            } else {
62                TIM6_TAKEN = true;
63                Some(INSTANCE)
64            }
65        })
66    }
67
68    /// Release exclusive access to TIM6
69    ///
70    /// This function allows you to return an `Instance` so that it
71    /// is available to `take()` again. This function will panic if
72    /// you return a different `Instance` or if this instance is not
73    /// already taken.
74    #[cfg(not(feature = "nosync"))]
75    #[inline]
76    pub fn release(inst: Instance) {
77        external_cortex_m::interrupt::free(|_| unsafe {
78            if TIM6_TAKEN && inst.addr == INSTANCE.addr {
79                TIM6_TAKEN = false;
80            } else {
81                panic!("Released a peripheral which was not taken");
82            }
83        });
84    }
85
86    /// Unsafely steal TIM6
87    ///
88    /// This function is similar to take() but forcibly takes the
89    /// Instance, marking it as taken irregardless of its previous
90    /// state.
91    #[cfg(not(feature = "nosync"))]
92    #[inline]
93    pub unsafe fn steal() -> Instance {
94        TIM6_TAKEN = true;
95        INSTANCE
96    }
97}
98
99/// Raw pointer to TIM6
100///
101/// Dereferencing this is unsafe because you are not ensured unique
102/// access to the peripheral, so you may encounter data races with
103/// other users of this peripheral. It is up to you to ensure you
104/// will not cause data races.
105///
106/// This constant is provided for ease of use in unsafe code: you can
107/// simply call for example `write_reg!(gpio, GPIOA, ODR, 1);`.
108pub const TIM6: *const RegisterBlock = 0x40001000 as *const _;
stm32ral/stm32l4/instances/tim6.rs

stm32ral/stm32l4/instances/
tim6.rs
