stm32ral/stm32f7/instances/scb.rs
1#![allow(non_snake_case, non_upper_case_globals)]
2#![allow(non_camel_case_types)]
3//! System control block
4//!
5//! Used by: stm32f730, stm32f745, stm32f750, stm32f765, stm32f7x2, stm32f7x3, stm32f7x6, stm32f7x7, stm32f7x9
6
7#[cfg(not(feature = "nosync"))]
8pub use crate::stm32f7::peripherals::scb::Instance;
9pub use crate::stm32f7::peripherals::scb::{RegisterBlock, ResetValues};
10pub use crate::stm32f7::peripherals::scb::{
11 AIRCR, BFAR, CCR, CFSR_UFSR_BFSR_MMFSR, CPUID, HFSR, ICSR, MMFAR, SCR, SHCRS, SHPR1, SHPR2,
12 SHPR3, VTOR,
13};
14
15/// Access functions for the SCB peripheral instance
16pub mod SCB {
17 use super::ResetValues;
18
19 #[cfg(not(feature = "nosync"))]
20 use super::Instance;
21
22 #[cfg(not(feature = "nosync"))]
23 const INSTANCE: Instance = Instance {
24 addr: 0xe000ed00,
25 _marker: ::core::marker::PhantomData,
26 };
27
28 /// Reset values for each field in SCB
29 pub const reset: ResetValues = ResetValues {
30 CPUID: 0x410FC241,
31 ICSR: 0x00000000,
32 VTOR: 0x00000000,
33 AIRCR: 0x00000000,
34 SCR: 0x00000000,
35 CCR: 0x00000000,
36 SHPR1: 0x00000000,
37 SHPR2: 0x00000000,
38 SHPR3: 0x00000000,
39 SHCRS: 0x00000000,
40 CFSR_UFSR_BFSR_MMFSR: 0x00000000,
41 HFSR: 0x00000000,
42 MMFAR: 0x00000000,
43 BFAR: 0x00000000,
44 };
45
46 #[cfg(not(feature = "nosync"))]
47 #[allow(renamed_and_removed_lints)]
48 #[allow(private_no_mangle_statics)]
49 #[no_mangle]
50 static mut SCB_TAKEN: bool = false;
51
52 /// Safe access to SCB
53 ///
54 /// This function returns `Some(Instance)` if this instance is not
55 /// currently taken, and `None` if it is. This ensures that if you
56 /// do get `Some(Instance)`, you are ensured unique access to
57 /// the peripheral and there cannot be data races (unless other
58 /// code uses `unsafe`, of course). You can then pass the
59 /// `Instance` around to other functions as required. When you're
60 /// done with it, you can call `release(instance)` to return it.
61 ///
62 /// `Instance` itself dereferences to a `RegisterBlock`, which
63 /// provides access to the peripheral's registers.
64 #[cfg(not(feature = "nosync"))]
65 #[inline]
66 pub fn take() -> Option<Instance> {
67 external_cortex_m::interrupt::free(|_| unsafe {
68 if SCB_TAKEN {
69 None
70 } else {
71 SCB_TAKEN = true;
72 Some(INSTANCE)
73 }
74 })
75 }
76
77 /// Release exclusive access to SCB
78 ///
79 /// This function allows you to return an `Instance` so that it
80 /// is available to `take()` again. This function will panic if
81 /// you return a different `Instance` or if this instance is not
82 /// already taken.
83 #[cfg(not(feature = "nosync"))]
84 #[inline]
85 pub fn release(inst: Instance) {
86 external_cortex_m::interrupt::free(|_| unsafe {
87 if SCB_TAKEN && inst.addr == INSTANCE.addr {
88 SCB_TAKEN = false;
89 } else {
90 panic!("Released a peripheral which was not taken");
91 }
92 });
93 }
94
95 /// Unsafely steal SCB
96 ///
97 /// This function is similar to take() but forcibly takes the
98 /// Instance, marking it as taken irregardless of its previous
99 /// state.
100 #[cfg(not(feature = "nosync"))]
101 #[inline]
102 pub unsafe fn steal() -> Instance {
103 SCB_TAKEN = true;
104 INSTANCE
105 }
106}
107
108/// Raw pointer to SCB
109///
110/// Dereferencing this is unsafe because you are not ensured unique
111/// access to the peripheral, so you may encounter data races with
112/// other users of this peripheral. It is up to you to ensure you
113/// will not cause data races.
114///
115/// This constant is provided for ease of use in unsafe code: you can
116/// simply call for example `write_reg!(gpio, GPIOA, ODR, 1);`.
117pub const SCB: *const RegisterBlock = 0xe000ed00 as *const _;