stm32ral/stm32f2/instances/
tim12.rs

1#![allow(non_snake_case, non_upper_case_globals)]
2#![allow(non_camel_case_types)]
3//! General-purpose-timers
4//!
5//! Used by: stm32f215, stm32f217
6
7#[cfg(not(feature = "nosync"))]
8pub use crate::stm32f2::peripherals::tim9::Instance;
9pub use crate::stm32f2::peripherals::tim9::{RegisterBlock, ResetValues};
10pub use crate::stm32f2::peripherals::tim9::{
11    ARR, CCER, CCMR1, CCR1, CCR2, CNT, CR1, CR2, DIER, EGR, PSC, SMCR, SR,
12};
13
14/// Access functions for the TIM12 peripheral instance
15pub mod TIM12 {
16    use super::ResetValues;
17
18    #[cfg(not(feature = "nosync"))]
19    use super::Instance;
20
21    #[cfg(not(feature = "nosync"))]
22    const INSTANCE: Instance = Instance {
23        addr: 0x40001800,
24        _marker: ::core::marker::PhantomData,
25    };
26
27    /// Reset values for each field in TIM12
28    pub const reset: ResetValues = ResetValues {
29        CR1: 0x00000000,
30        CR2: 0x00000000,
31        SMCR: 0x00000000,
32        DIER: 0x00000000,
33        SR: 0x00000000,
34        EGR: 0x00000000,
35        CCMR1: 0x00000000,
36        CCER: 0x00000000,
37        CNT: 0x00000000,
38        PSC: 0x00000000,
39        ARR: 0x00000000,
40        CCR1: 0x00000000,
41        CCR2: 0x00000000,
42    };
43
44    #[cfg(not(feature = "nosync"))]
45    #[allow(renamed_and_removed_lints)]
46    #[allow(private_no_mangle_statics)]
47    #[no_mangle]
48    static mut TIM12_TAKEN: bool = false;
49
50    /// Safe access to TIM12
51    ///
52    /// This function returns `Some(Instance)` if this instance is not
53    /// currently taken, and `None` if it is. This ensures that if you
54    /// do get `Some(Instance)`, you are ensured unique access to
55    /// the peripheral and there cannot be data races (unless other
56    /// code uses `unsafe`, of course). You can then pass the
57    /// `Instance` around to other functions as required. When you're
58    /// done with it, you can call `release(instance)` to return it.
59    ///
60    /// `Instance` itself dereferences to a `RegisterBlock`, which
61    /// provides access to the peripheral's registers.
62    #[cfg(not(feature = "nosync"))]
63    #[inline]
64    pub fn take() -> Option<Instance> {
65        external_cortex_m::interrupt::free(|_| unsafe {
66            if TIM12_TAKEN {
67                None
68            } else {
69                TIM12_TAKEN = true;
70                Some(INSTANCE)
71            }
72        })
73    }
74
75    /// Release exclusive access to TIM12
76    ///
77    /// This function allows you to return an `Instance` so that it
78    /// is available to `take()` again. This function will panic if
79    /// you return a different `Instance` or if this instance is not
80    /// already taken.
81    #[cfg(not(feature = "nosync"))]
82    #[inline]
83    pub fn release(inst: Instance) {
84        external_cortex_m::interrupt::free(|_| unsafe {
85            if TIM12_TAKEN && inst.addr == INSTANCE.addr {
86                TIM12_TAKEN = false;
87            } else {
88                panic!("Released a peripheral which was not taken");
89            }
90        });
91    }
92
93    /// Unsafely steal TIM12
94    ///
95    /// This function is similar to take() but forcibly takes the
96    /// Instance, marking it as taken irregardless of its previous
97    /// state.
98    #[cfg(not(feature = "nosync"))]
99    #[inline]
100    pub unsafe fn steal() -> Instance {
101        TIM12_TAKEN = true;
102        INSTANCE
103    }
104}
105
106/// Raw pointer to TIM12
107///
108/// Dereferencing this is unsafe because you are not ensured unique
109/// access to the peripheral, so you may encounter data races with
110/// other users of this peripheral. It is up to you to ensure you
111/// will not cause data races.
112///
113/// This constant is provided for ease of use in unsafe code: you can
114/// simply call for example `write_reg!(gpio, GPIOA, ODR, 1);`.
115pub const TIM12: *const RegisterBlock = 0x40001800 as *const _;