Expand description
Reset and clock control
Modules§
- AHB1ENR
- AHB1 peripheral clock register
- AHB1LPENR
- AHB1 peripheral clock enable in low power mode register
- AHB1RSTR
- AHB1 peripheral reset register
- AHB2ENR
- AHB2 peripheral clock enable register
- AHB2LPENR
- AHB2 peripheral clock enable in low power mode register
- AHB2RSTR
- AHB2 peripheral reset register
- APB1ENR
- APB1 peripheral clock enable register
- APB1LPENR
- APB1 peripheral clock enable in low power mode register
- APB1RSTR
- APB1 peripheral reset register
- APB2ENR
- APB2 peripheral clock enable register
- APB2LPENR
- APB2 peripheral clock enabled in low power mode register
- APB2RSTR
- APB2 peripheral reset register
- BDCR
- Backup domain control register
- CFGR
- clock configuration register
- CIR
- clock interrupt register
- CR
- clock control register
- CSR
- clock control & status register
- DCKCFGR
- RCC Dedicated Clock Configuration Register
- PLLCFGR
- PLL configuration register
- PLLI2SCFGR
- PLLI2S configuration register
- RCC
- Access functions for the RCC peripheral instance
- SSCGR
- spread spectrum clock generation register
Structs§
Constants§
- RCC
- Raw pointer to RCC