stm32ral/stm32f3/stm32f3x8/
interrupts.rs

1#[cfg(feature = "rt")]
2extern "C" {
3    fn WWDG_IRQ();
4    fn PVD_IRQ();
5    fn TAMP_STAMP();
6    fn RTC_WKUP();
7    fn FLASH_IRQ();
8    fn RCC_IRQ();
9    fn EXTI0();
10    fn EXTI1();
11    fn EXTI2_TSC();
12    fn EXTI3();
13    fn EXTI4();
14    fn DMA1_CH1_IRQ();
15    fn DMA1_CH2_IRQ();
16    fn DMA1_CH3_IRQ();
17    fn DMA1_CH4_IRQ();
18    fn DMA1_CH5_IRQ();
19    fn DMA1_CH6_IRQ();
20    fn DMA1_CH7_IRQ();
21    fn ADC1_2();
22    fn CAN_TX_IRQ();
23    fn CAN_RXD_IRQ();
24    fn CAN_RXI_IRQ();
25    fn CAN_SCE_IRQ();
26    fn EXTI9_5();
27    fn TIM15_IRQ();
28    fn TIM16_IRQ();
29    fn TIM17_IRQ();
30    fn TIM18_DAC3_IRQ();
31    fn TIM2_IRQ();
32    fn TIM3_IRQ();
33    fn TIM4_IRQ();
34    fn I2C1_EV_IRQ();
35    fn I2C1_ER_IRQ();
36    fn I2C2_EV_IRQ();
37    fn I2C2_ER_IRQ();
38    fn SPI1_IRQ();
39    fn SPI2_IRQ();
40    fn USART1_IRQ();
41    fn USART2_IRQ();
42    fn USART3_IRQ();
43    fn EXTI15_10_IRQ();
44    fn RTC_ALARM_IT_IRQ();
45    fn TIM12_IRQ();
46    fn TIM13_IRQ();
47    fn TIM14_IRQ();
48    fn TIM8_CC();
49    fn ADC3();
50    fn FMC();
51    fn TIM5_IRQ();
52    fn SPI3_IRQ();
53    fn UART4_EXTI34();
54    fn UART5_EXTI35();
55    fn TIM6_DAC1();
56    fn TIM7_IRQ();
57    fn DMA2_Channel1();
58    fn DMA2_Channel2();
59    fn DMA2_Channel3();
60    fn DMA2_Channel4();
61    fn DMA2_Channel5();
62    fn ADC_SD1_IRQ();
63    fn ADC_SD2_IRQ();
64    fn ADC_SD3_IRQ();
65    fn COMP1_2_3();
66    fn COMP4_5_6();
67    fn COMP7();
68    fn I2C3_EV();
69    fn I2C3_ER();
70    fn USB_HP_IRQ();
71    fn USB_LP_IRQ();
72    fn USB_WAKEUP_IRQ();
73    fn TIM20_BRK();
74    fn TIM19_IRQ();
75    fn TIM20_TRG_COM();
76    fn TIM20_CC();
77    fn FPU();
78}
79
80#[doc(hidden)]
81pub union Vector {
82    _handler: unsafe extern "C" fn(),
83    _reserved: u32,
84}
85
86#[cfg(feature = "rt")]
87#[doc(hidden)]
88#[link_section = ".vector_table.interrupts"]
89#[no_mangle]
90pub static __INTERRUPTS: [Vector; 82] = [
91    Vector { _handler: WWDG_IRQ },
92    Vector { _handler: PVD_IRQ },
93    Vector {
94        _handler: TAMP_STAMP,
95    },
96    Vector { _handler: RTC_WKUP },
97    Vector {
98        _handler: FLASH_IRQ,
99    },
100    Vector { _handler: RCC_IRQ },
101    Vector { _handler: EXTI0 },
102    Vector { _handler: EXTI1 },
103    Vector {
104        _handler: EXTI2_TSC,
105    },
106    Vector { _handler: EXTI3 },
107    Vector { _handler: EXTI4 },
108    Vector {
109        _handler: DMA1_CH1_IRQ,
110    },
111    Vector {
112        _handler: DMA1_CH2_IRQ,
113    },
114    Vector {
115        _handler: DMA1_CH3_IRQ,
116    },
117    Vector {
118        _handler: DMA1_CH4_IRQ,
119    },
120    Vector {
121        _handler: DMA1_CH5_IRQ,
122    },
123    Vector {
124        _handler: DMA1_CH6_IRQ,
125    },
126    Vector {
127        _handler: DMA1_CH7_IRQ,
128    },
129    Vector { _handler: ADC1_2 },
130    Vector {
131        _handler: CAN_TX_IRQ,
132    },
133    Vector {
134        _handler: CAN_RXD_IRQ,
135    },
136    Vector {
137        _handler: CAN_RXI_IRQ,
138    },
139    Vector {
140        _handler: CAN_SCE_IRQ,
141    },
142    Vector { _handler: EXTI9_5 },
143    Vector {
144        _handler: TIM15_IRQ,
145    },
146    Vector {
147        _handler: TIM16_IRQ,
148    },
149    Vector {
150        _handler: TIM17_IRQ,
151    },
152    Vector {
153        _handler: TIM18_DAC3_IRQ,
154    },
155    Vector { _handler: TIM2_IRQ },
156    Vector { _handler: TIM3_IRQ },
157    Vector { _handler: TIM4_IRQ },
158    Vector {
159        _handler: I2C1_EV_IRQ,
160    },
161    Vector {
162        _handler: I2C1_ER_IRQ,
163    },
164    Vector {
165        _handler: I2C2_EV_IRQ,
166    },
167    Vector {
168        _handler: I2C2_ER_IRQ,
169    },
170    Vector { _handler: SPI1_IRQ },
171    Vector { _handler: SPI2_IRQ },
172    Vector {
173        _handler: USART1_IRQ,
174    },
175    Vector {
176        _handler: USART2_IRQ,
177    },
178    Vector {
179        _handler: USART3_IRQ,
180    },
181    Vector {
182        _handler: EXTI15_10_IRQ,
183    },
184    Vector {
185        _handler: RTC_ALARM_IT_IRQ,
186    },
187    Vector { _reserved: 0 },
188    Vector {
189        _handler: TIM12_IRQ,
190    },
191    Vector {
192        _handler: TIM13_IRQ,
193    },
194    Vector {
195        _handler: TIM14_IRQ,
196    },
197    Vector { _handler: TIM8_CC },
198    Vector { _handler: ADC3 },
199    Vector { _handler: FMC },
200    Vector { _reserved: 0 },
201    Vector { _handler: TIM5_IRQ },
202    Vector { _handler: SPI3_IRQ },
203    Vector {
204        _handler: UART4_EXTI34,
205    },
206    Vector {
207        _handler: UART5_EXTI35,
208    },
209    Vector {
210        _handler: TIM6_DAC1,
211    },
212    Vector { _handler: TIM7_IRQ },
213    Vector {
214        _handler: DMA2_Channel1,
215    },
216    Vector {
217        _handler: DMA2_Channel2,
218    },
219    Vector {
220        _handler: DMA2_Channel3,
221    },
222    Vector {
223        _handler: DMA2_Channel4,
224    },
225    Vector {
226        _handler: DMA2_Channel5,
227    },
228    Vector {
229        _handler: ADC_SD1_IRQ,
230    },
231    Vector {
232        _handler: ADC_SD2_IRQ,
233    },
234    Vector {
235        _handler: ADC_SD3_IRQ,
236    },
237    Vector {
238        _handler: COMP1_2_3,
239    },
240    Vector {
241        _handler: COMP4_5_6,
242    },
243    Vector { _handler: COMP7 },
244    Vector { _reserved: 0 },
245    Vector { _reserved: 0 },
246    Vector { _reserved: 0 },
247    Vector { _reserved: 0 },
248    Vector { _reserved: 0 },
249    Vector { _handler: I2C3_EV },
250    Vector { _handler: I2C3_ER },
251    Vector {
252        _handler: USB_HP_IRQ,
253    },
254    Vector {
255        _handler: USB_LP_IRQ,
256    },
257    Vector {
258        _handler: USB_WAKEUP_IRQ,
259    },
260    Vector {
261        _handler: TIM20_BRK,
262    },
263    Vector {
264        _handler: TIM19_IRQ,
265    },
266    Vector {
267        _handler: TIM20_TRG_COM,
268    },
269    Vector { _handler: TIM20_CC },
270    Vector { _handler: FPU },
271];
272
273/// Available interrupts for this device
274#[repr(u16)]
275#[derive(Copy, Clone, Debug, PartialEq, Eq)]
276#[allow(non_camel_case_types)]
277pub enum Interrupt {
278    /// 0: Window Watchdog interrupt
279    WWDG_IRQ = 0,
280    /// 1: Power voltage detector through EXTI line detection interrupt
281    PVD_IRQ = 1,
282    /// 2: Tamper and TimeStamp interrupts
283    TAMP_STAMP = 2,
284    /// 3: RTC Wakeup interrupt through the EXTI line
285    RTC_WKUP = 3,
286    /// 4: Flash global interrupt
287    FLASH_IRQ = 4,
288    /// 5: RCC global interrupt
289    RCC_IRQ = 5,
290    /// 6: EXTI Line0 interrupt
291    EXTI0 = 6,
292    /// 7: EXTI Line3 interrupt
293    EXTI1 = 7,
294    /// 8: EXTI Line2 and Touch sensing interrupts
295    EXTI2_TSC = 8,
296    /// 9: EXTI Line3 interrupt
297    EXTI3 = 9,
298    /// 10: EXTI Line4 interrupt
299    EXTI4 = 10,
300    /// 11: DMA1 channel 1 interrupt
301    DMA1_CH1_IRQ = 11,
302    /// 12: DMA1 channel 2 interrupt
303    DMA1_CH2_IRQ = 12,
304    /// 13: DMA1 channel 3 interrupt
305    DMA1_CH3_IRQ = 13,
306    /// 14: DMA1 channel 4 interrupt
307    DMA1_CH4_IRQ = 14,
308    /// 15: DMA1 channel 5 interrupt
309    DMA1_CH5_IRQ = 15,
310    /// 16: DMA1 channel 6 interrupt
311    DMA1_CH6_IRQ = 16,
312    /// 17: DMA1 channel 7 interrupt
313    DMA1_CH7_IRQ = 17,
314    /// 18: ADC1 and ADC2 global interrupt
315    ADC1_2 = 18,
316    /// 19: USB high priority/CAN_TX interrupt
317    CAN_TX_IRQ = 19,
318    /// 20: USB low priority/CAN_RXD interrupt
319    CAN_RXD_IRQ = 20,
320    /// 21: CAN_RXI interrupt
321    CAN_RXI_IRQ = 21,
322    /// 22: CAN_SCE interrupt
323    CAN_SCE_IRQ = 22,
324    /// 23: EXTI Line5 to Line9 interrupts
325    EXTI9_5 = 23,
326    /// 24: Timer 15 global interrupt
327    TIM15_IRQ = 24,
328    /// 25: Timer 16 global interrupt
329    TIM16_IRQ = 25,
330    /// 26: Timer 17 global interrupt
331    TIM17_IRQ = 26,
332    /// 27: Timer 18 global interrupt/DAC3 underrun interrupt
333    TIM18_DAC3_IRQ = 27,
334    /// 28: Timer 2 global interrupt
335    TIM2_IRQ = 28,
336    /// 29: Timer 3 global interrupt
337    TIM3_IRQ = 29,
338    /// 30: Timer 4 global interrupt
339    TIM4_IRQ = 30,
340    /// 31: I2C1_EV global interrupt/EXTI Line\[3:2\] interrupts
341    I2C1_EV_IRQ = 31,
342    /// 32: I2C1_ER
343    I2C1_ER_IRQ = 32,
344    /// 33: I2C2_EV global interrupt/EXTI Line\[4:2\] interrupts
345    I2C2_EV_IRQ = 33,
346    /// 34: I2C2_ER
347    I2C2_ER_IRQ = 34,
348    /// 35: SPI1 global interrupt
349    SPI1_IRQ = 35,
350    /// 36: SPI2 global interrupt
351    SPI2_IRQ = 36,
352    /// 37: USART1 global interrupt/EXTI25 (USART1 wakeup event)
353    USART1_IRQ = 37,
354    /// 38: USART2 global interrupt/EXTI26 (USART1 wakeup event)
355    USART2_IRQ = 38,
356    /// 39: USART3 global interrupt/EXTI28 (USART1 wakeup event)
357    USART3_IRQ = 39,
358    /// 40: EXTI Line\[15:10\] interrupts
359    EXTI15_10_IRQ = 40,
360    /// 41: RTC alarm interrupt
361    RTC_ALARM_IT_IRQ = 41,
362    /// 43: Timer 12 global interrupt
363    TIM12_IRQ = 43,
364    /// 44: Timer 13 global interrupt
365    TIM13_IRQ = 44,
366    /// 45: Timer 14 global interrupt
367    TIM14_IRQ = 45,
368    /// 46: TIM8 capture compare interrupt
369    TIM8_CC = 46,
370    /// 47: ADC3 global interrupt
371    ADC3 = 47,
372    /// 48: FSMC global interrupt
373    FMC = 48,
374    /// 50: Timer 5 global interrupt
375    TIM5_IRQ = 50,
376    /// 51: SPI3 global interrupt
377    SPI3_IRQ = 51,
378    /// 52: UART4 global and EXTI Line 34 interrupts
379    UART4_EXTI34 = 52,
380    /// 53: UART5 global and EXTI Line 35 interrupts
381    UART5_EXTI35 = 53,
382    /// 54: TIM6 global, DAC1 Cahnnel1 and Cahnnel2 underrun error Interrupts
383    TIM6_DAC1 = 54,
384    /// 55: Timer 7 global interrupt
385    TIM7_IRQ = 55,
386    /// 56: DMA2 channel1 global interrupt
387    DMA2_Channel1 = 56,
388    /// 57: DMA2 channel2 global interrupt
389    DMA2_Channel2 = 57,
390    /// 58: DMA2 channel3 global interrupt
391    DMA2_Channel3 = 58,
392    /// 59: DMA2 channel4 global interrupt
393    DMA2_Channel4 = 59,
394    /// 60: DMA2 channel5 global interrupt
395    DMA2_Channel5 = 60,
396    /// 61: ADC sigma delta 1 (SDADC1) global interrupt
397    ADC_SD1_IRQ = 61,
398    /// 62: ADC sigma delta 2 (SDADC2) global interrupt
399    ADC_SD2_IRQ = 62,
400    /// 63: ADC sigma delta 3 (SDADC3) global interrupt
401    ADC_SD3_IRQ = 63,
402    /// 64: COMP1_2_3 interrupt combined with EXTI lines 21, 22, 29
403    COMP1_2_3 = 64,
404    /// 65: COMP4_5_6 interrupt combined with EXTI lines 30, 31, 32
405    COMP4_5_6 = 65,
406    /// 66: COMP7 interrupt combined with EXTI line 33
407    COMP7 = 66,
408    /// 72: I2C3 Event interrupt
409    I2C3_EV = 72,
410    /// 73: I2C3 Error interrupt
411    I2C3_ER = 73,
412    /// 74: USB high priority interrupt
413    USB_HP_IRQ = 74,
414    /// 75: USB low priority interrupt
415    USB_LP_IRQ = 75,
416    /// 76: USB wakeup interrupt
417    USB_WAKEUP_IRQ = 76,
418    /// 77: TIM20 Break interrupt
419    TIM20_BRK = 77,
420    /// 78: Timer 19 global interrupt
421    TIM19_IRQ = 78,
422    /// 79: TIM20 Trigger and Commutation interrupt
423    TIM20_TRG_COM = 79,
424    /// 80: TIM20 Capture Compare interrupt
425    TIM20_CC = 80,
426    /// 81: Floating point unit interrupt
427    FPU = 81,
428}
429unsafe impl external_cortex_m::interrupt::InterruptNumber for Interrupt {
430    #[inline(always)]
431    fn number(self) -> u16 {
432        self as u16
433    }
434}
stm32ral/stm32f3/stm32f3x8/interrupts.rs

stm32ral/stm32f3/stm32f3x8/
interrupts.rs
