Enum stm32ral::stm32wl::stm32wl5x_cm0p::interrupts::Interrupt

#[repr(u16)]
pub enum Interrupt {
    TZIC_ILA,
    PVD_PVM_3,
    TAMP_RTCSTAMP_LSECSS_RTCALARM_RTCSSRU_RTCWKUP,
    FLASH_RCC_C1SEV,
    EXTI1_0,
    EXTI3_2,
    EXTI15_4,
    ADC_COMP_DAC,
    DMA1_CH3_1,
    DMA1_CH7_4,
    DMA2_CH7_1_DMAMUX1_OVR,
    LPTIM1,
    LPTIM2,
    LPTIM3,
    TIM1_BRK_TIM1_UP_TIM1_TRG_COM_TIM1_CC,
    TIM2,
    TIM16,
    TIM17,
    IPCC_C2_RX_IT_IPCC_C2_TX_IT,
    HSEM,
    True_RNG,
    AES_PKA,
    I2C1_EV_I2C1_ER,
    I2C2_EV_I2C2_ER,
    I2C3_EV_I2C3_ER,
    SPI1,
    SPI2S2,
    USART1,
    USART2,
    LPUART1,
    SUBGHZSPI,
    Radio_IRQ_Busy,
}

Available interrupts for this device

Variants

TZIC_ILA

0: Security Interrupt controller illegal access interrupt

PVD_PVM_3

1: PVD through EXTI[16], PVM[3] through EXTI[34]

TAMP_RTCSTAMP_LSECSS_RTCALARM_RTCSSRU_RTCWKUP

2: Tamper, TimeStamp, LSECSS,alarm A and B,SSR underflow,RTC wakeup interrupt

FLASH_RCC_C1SEV

3: Flash memory global interrupt and Flash memory ECC single error interrupt,RCC global interrupt,CPU1 SEV through EXTI

EXTI1_0

4: EXTI line 0 interrupt through EXTI

EXTI3_2

5: EXTI line 1 interrupt through EXTI

EXTI15_4

6: EXTI line 2 interrupt through EXTI

ADC_COMP_DAC

7: ADC and DAC global interrupt,COMP1 and COMP2 interrupt through EXTI

DMA1_CH3_1

8: DMA1 channel 3:1 secure and non-secure interrupt (C2IMR2[2:0])

DMA1_CH7_4

9: DMA1 channel 7:4 secure and non-secure interrupt (C2IMR2[6:3])

DMA2_CH7_1_DMAMUX1_OVR

10: DMA2 channel 7:1 secure and non-secure interrupt (C2IMR2[14:8]),DMAMUX1 overrun interrupt (C2IMR2[15])

LPTIM1

11: LPtimer 1 global interrupt

LPTIM2

12: LPtimer 2 global interrupt

LPTIM3

13: LPtimer 3 global interrupt

TIM1_BRK_TIM1_UP_TIM1_TRG_COM_TIM1_CC

14: Timer 1 break, update, trigger and communication,capture compare interrupt

TIM2

15: Timer 2 global interrupt

TIM16

16: Timer 16 global interrupt

TIM17

17: Timer 17 global interrupt

IPCC_C2_RX_IT_IPCC_C2_TX_IT

18: IPCC CPU2 RX occupied interrupt, IPCC CPU2 TX free interrupt

HSEM

19: Semaphore interrupt 1 to CPU2

True_RNG

20: True random number generator interrupt

AES_PKA

21: AES global interrupt , Private key accelerator interrupt

I2C1_EV_I2C1_ER

22: I2C1 event interrupt,I2C1 error interrupt

I2C2_EV_I2C2_ER

23: I2C2 event interrupt , I2C2 error interrupt

I2C3_EV_I2C3_ER

24: I2C3 event interrupt , I2C2 error interrupt

SPI1

25: SPI 1 global interrupt

SPI2S2

26: SPI2S2 global interrupt

USART1

27: USART1 global interrupt

USART2

28: USART2 global interrupt

LPUART1

29: LPUART1 global interrupt

SUBGHZSPI

30: Sub-GHz radio SPI global interrupt

Radio_IRQ_Busy

31: Radio IRQs, RFBUSY interrupt through EXTI

Trait Implementations

impl Clone for Interrupt

fn clone(&self) -> Interrupt

Returns a copy of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Debug for Interrupt

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl InterruptNumber for Interrupt

fn number(self) -> u16

Return the interrupt number associated with this variant.

impl PartialEq<Interrupt> for Interrupt

fn eq(&self, other: &Interrupt) -> bool

This method tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

This method tests for !=.

impl Copy for Interrupt

impl Eq for Interrupt

impl StructuralEq for Interrupt

impl StructuralPartialEq for Interrupt